If you made any changes in Pure, your changes will be visible here soon.

Research Output 2000 2019

2019

A dependable detection mechanism for intersection management of Connected Autonomous Vehicles

Dedinsky, R., Khayatian, M., Mehrabian, M. & Shrivastava, A., Mar 1 2019, In : OpenAccess Series in Informatics. 68, 7.

Research output: Contribution to journalConference article

Autonomous Vehicles
Intersection
manager
Managers
management
1 Citation (Scopus)

A software-level Redundant MultiThreading for Soft/Hard Error Detection and Recovery

So, H., Didehban, M., Shrivastava, A. & Lee, K., May 14 2019, Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019. Institute of Electrical and Electronics Engineers Inc., p. 1559-1562 4 p. 8715089. (Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Error Recovery
Multithreading
Error Detection
Error detection
Resiliency

Control flow checking or not? (for Soft Errors)

Rhisheekesan, A., Jeyapaul, R. & Shrivastava, A., Feb 1 2019, In : ACM Transactions on Embedded Computing Systems. 18, 1, 11.

Research output: Contribution to journalArticle

Flow control
Chlorofluorocarbons
Hardware
Chemical analysis
Costs

Efficient heap data management on software managed manycore architectures

Lin, J. P., Lu, J., Cai, J. & Shrivastava, A., May 9 2019, Proceedings - 32nd International Conference on VLSI Design, VLSID 2019 - Held concurrently with 18th International Conference on Embedded Systems, ES 2019. Institute of Electrical and Electronics Engineers Inc., p. 269-274 6 p. 8710801. (Proceedings - 32nd International Conference on VLSI Design, VLSID 2019 - Held concurrently with 18th International Conference on Embedded Systems, ES 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Information management
Memory architecture
Data storage equipment

INVITED: Software Approaches for In-time Resilience

Shrivastava, A. & Didehban, M., Jun 2 2019, Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., a197. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Semiconductor device manufacture
Resilience
Computer-aided Design
Computer aided design
Software

RIM: Robust Intersection Management for Connected Autonomous Vehicles

Khayatian, M., Mehrabian, M. & Shrivastava, A., Jan 4 2019, Proceedings - 39th IEEE Real-Time Systems Symposium, RTSS 2018. Institute of Electrical and Electronics Engineers Inc., p. 35-44 10 p. 8603190. (Proceedings - Real-Time Systems Symposium; vol. 2018-December).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Reaction injection molding
Managers
Throughput
Trajectories

WCET-Aware stack frame management of embedded systems using scratchpad memories

Kim, Y., Khayatian, M. & Shrivastava, A., May 9 2019, Proceedings - 32nd International Conference on VLSI Design, VLSID 2019 - Held concurrently with 18th International Conference on Embedded Systems, ES 2019. Institute of Electrical and Electronics Engineers Inc., p. 543-544 2 p. 8711300. (Proceedings - 32nd International Conference on VLSI Design, VLSID 2019 - Held concurrently with 18th International Conference on Embedded Systems, ES 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Embedded systems
Data storage equipment
2018
2 Citations (Scopus)

A Compiler Technique for Processor-Wide Protection From Soft Errors in Multithreaded Environments

Didehban, M. & Shrivastava, A., Feb 9 2018, (Accepted/In press) In : IEEE Transactions on Reliability.

Research output: Contribution to journalArticle

Microprocessor chips
Transistors
Data storage equipment
Experiments
1 Citation (Scopus)

An efficient timestamp-based monitoring approach to test timing constraints of cyber-physical systems

Mehrabian, M., Khayatian, M., Mousa, A., Shrivastava, A., Li-Baboud, Y. S., Derler, P., Griffor, E., Andrade, H. A., Wiess, M., Eidson, J. C. & Anand, D., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., Vol. Part F137710. a144

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Timestamp
Timing
Monitoring
Resources
Signal sampling
3 Citations (Scopus)

Expert: Effective and flexible error protection by redundant multithreading

So, H., Didehban, M., Ko, Y., Shrivastava, A. & Lee, K., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 533-538 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Data storage equipment
Microprocessor chips
Thread
Experiments

Guest editorial: Special issue on accelerated computing

Shrivastava, A. & Kurdahi, F. J., Jan 1 2018, In : IEEE Transactions on Multi-Scale Computing Systems. 4, 1, p. 1-2 2 p.

Research output: Contribution to journalEditorial

1 Citation (Scopus)

LASER: A hardware/software approach to accelerate complicated loops on CGRAs

Balasubramanian, M., Dave, S., Shrivastava, A. & Jeyapaul, R., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 1069-1074 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Computer hardware
Particle accelerators
Decoding
Energy utilization

Message from program chairs

Shrivastava, A. & Pasricha, S., Nov 6 2018, In : 2018 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2018. 8525903.

Research output: Contribution to journalEditorial

2 Citations (Scopus)

RAMP: Resource-aware mapping for CGRAs

Dave, S., Balasubramanian, M. & Shrivastava, A., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., Vol. Part F137710. a127

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routing
Resources
Scheduling
Accelerate
Rescheduling

URECA: Unified register file for CGRAs

Dave, S., Balasubramanian, M. & Shrivastava, A., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 1081-1086 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Energy utilization
2017
2 Citations (Scopus)

Crossroads: Time-Sensitive Autonomous Intersection Management Technique

Andert, E., Khayatian, M. & Shrivastava, A., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., Vol. Part 128280. 50

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Intersection
Buffer
Managers
Throughput
Safety

Hardware-aware compilation

Shrivastava, A. & Cai, J., Nov 1 2017, Handbook of Hardware/Software Codesign. Springer Netherlands, p. 795-827 33 p.

Research output: Chapter in Book/Report/Conference proceedingChapter

Hardware
Embedded systems
Computer hardware
Costs
5 Citations (Scopus)

InCheck: An In-Application Recovery Scheme for Soft Errors

Didehban, M., Lokam, S. R. D. & Shrivastava, A., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., Vol. Part 128280. 40

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Soft Error
Recovery
Coverage
Hardware
Error Recovery

Introduction to hardware/software codesign

Ha, S., Teich, J., Haubelt, C., Glaß, M., Mitra, T., Dömer, R., Eles, P., Shrivastava, A., Gerstlauer, A. & Bhattacharyya, S. S., Nov 1 2017, Handbook of Hardware/Software Codesign. Springer Netherlands, p. 3-26 24 p.

Research output: Chapter in Book/Report/Conference proceedingForeword/postscript

Hardware-software codesign
3 Citations (Scopus)

INVITED: A Testbed to Verify the Timing Behavior of Cyber-Physical Systems: Invited

Shrivastava, A., Mehrabian, M., Khayatian, M., Derler, P., Andrade, H., Stanton, K., Li-Baboud, Y. S., Griffor, E., Weiss, M. & Eidson, J., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., Vol. Part 128280. 69

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Testbeds
Testbed
Timing
Verify
Cyber Physical System
3 Citations (Scopus)

NEMESIS: A software approach for computing in presence of soft errors

Didehban, M., Shrivastava, A. & Lokam, S. R. D., Dec 13 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-November. p. 297-304 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Recovery
Error detection
Microprocessor chips
Hardware
Data storage equipment

Protecting caches from soft errors: A microarchitect's perspective

Ko, Y., Jeyapaul, R., Kim, Y., Lee, K. & Shrivastava, A., May 1 2017, In : ACM Transactions on Embedded Computing Systems. 16, 4, 93.

Research output: Contribution to journalReview article

Error detection
Error correction
Cache memory
Embedded systems
Experiments

Reducing code management overhead in software-managed multicores

Cai, J., Kim, Y., Kim, Y., Shrivastava, A. & Lee, K., May 11 2017, Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017. Institute of Electrical and Electronics Engineers Inc., p. 1241-1244 4 p. 7927179

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Software architecture
Computer hardware
Scalability
Experiments
2 Citations (Scopus)

Timestamp Temporal Logic (TTL) for testing the timing of Cyber-Physical Systems

Mehrabian, M., Khayatian, M., Shrivastava, A., Eidson, J. C., Derler, P., Andrade, H. A., Li-Baboud, Y. S., Griffor, E., Weiss, M. & Stanton, K., Sep 1 2017, In : ACM Transactions on Embedded Computing Systems. 16, 5s, 169.

Research output: Contribution to journalArticle

Temporal logic
Testing
Monitoring
Cyber Physical System
Phase control
1 Citation (Scopus)

Wcet-aware function-level dynamic code management on Scratchpad memory

Kim, Y., Broman, D. & Shrivastava, A., May 1 2017, In : ACM Transactions on Embedded Computing Systems. 16, 4, 112.

Research output: Contribution to journalArticle

Data storage equipment
Linear programming
Block codes
Polynomials
Industry
2016
4 Citations (Scopus)

Automatic management of Software Programmable Memories in Many-core Architectures

Shrivastava, A., Dutt, N., Cai, J., Shoushtari, M., Donyanavard, B. & Tajik, H., Nov 1 2016, In : IET Computers and Digital Techniques. 10, 6, p. 288-298 11 p.

Research output: Contribution to journalArticle

Data storage equipment
Embedded systems
Hardware

Efficient pointer management of stack data for software managed multicores

Cai, J. & Shrivastava, A., Nov 28 2016, 2016 IEEE 27th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2016. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-November. p. 67-74 8 p. 7760774

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Information management
Computer hardware
Experiments
5 Citations (Scopus)

GemV: A validated toolset for the early exploration of system reliability

Tanikella, K., Koy, Y., Jeyapaul, R., Lee, K. & Shrivastava, A., Nov 28 2016, 2016 IEEE 27th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2016. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-November. p. 159-163 5 p. 7760786

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Analytical models
Experiments
1 Citation (Scopus)

Languages must expose memory heterogeneity

Guo, X., Shrivastava, A., Spear, M. & Tan, G., Oct 3 2016, MEMSYS 2016 - Proceedings of the International Symposium on Memory Systems. Association for Computing Machinery, Vol. 03-06-October-2016. p. 251-256 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Computer programming languages
Computer hardware
Explosions
1 Citation (Scopus)

Margdarshak: A mobile data analytics based commute time estimator cum route recommender

Verma, R., Shrivastava, A., Chakraborty, S. & Mitra, B., Jun 26 2016, WPA 2016 - Proceedings of the 3rd International Workshop on Physical Analytics, co-located with MobiSys 2016. Association for Computing Machinery, Inc, p. 31-36 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Traffic signals
Navigation systems
Traffic congestion
Travel time
Error analysis
19 Citations (Scopus)

NZDC: A compiler technique for near zero silent data corruption

Didehban, M. & Shrivastava, A., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., Vol. 05-09-June-2016. a48

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Soft Error
Compiler
Zero
Duplication
Fault Injection
2 Citations (Scopus)

Software Coherence Management on Non-coherent Cache Multi-cores

Cai, J. & Shrivastava, A., Mar 16 2016, Proceedings of the IEEE International Conference on VLSI Design. IEEE Computer Society, Vol. 2016-March. p. 397-402 6 p. 7434986

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Parallel programming
Dynamic mechanical analysis
Signal processing
Electric power utilization
2 Citations (Scopus)

Splitting functions in code management on scratchpad memories

Kim, Y., Cai, J., Kim, Y., Lee, K. & Shrivastava, A., Nov 7 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2016. Institute of Electrical and Electronics Engineers Inc., Vol. 07-10-November-2016. 2967075

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Block codes
Scalability
Energy utilization
1 Citation (Scopus)

Systematic Methodology for the Quantitative Analysis of Pipeline-Register Reliability

Jeyapaul, R., Flores, R., Avila, A. & Shrivastava, A., Jun 14 2016, (Accepted/In press) In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Research output: Contribution to journalArticle

Pipelines
Chemical analysis
Pipe
Hardening
6 Citations (Scopus)

Time in cyber-physical systems

Shrivastava, A., Derler, P., Baboud, Y. S. L., Stanton, K., Khayatian, M., Andrade, H. A., Weiss, M., Eidson, J. & Chandhoke, S., Nov 21 2016, 2016 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2016. Institute of Electrical and Electronics Engineers Inc., 7750983

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cyber Physical System
Clocks
Actuators
Automation
Systems analysis
5 Citations (Scopus)

Towards a reconfigurable distributed testbed to enable advanced research and development of timing and synchronization in cyber-physical systems

Andrade, H. A., Derler, P., Eidson, J. C., Li-Baboud, Y. S., Shrivastava, A., Stanton, K. & Weiss, M., Jan 25 2016, 2015 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015. Institute of Electrical and Electronics Engineers Inc., 7393352

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Testbeds
Microprocessor chips
Synchronization
Application specific integrated circuits
Conceptual design
4 Citations (Scopus)

Unsupervised annotated city traffic map generation

Verma, R., Ghosh, S., Shrivastava, A., Ganguly, N., Mitra, B. & Chakraborty, S., Oct 31 2016, 24th ACM SIGSPATIAL International Conference on Advances in Geographic Information Systems, ACM SIGSPATIAL GIS 2016. Association for Computing Machinery, 59

Research output: Chapter in Book/Report/Conference proceedingConference contribution

India
Traffic
CAN Bus
Leverage
Repository
12 Citations (Scopus)

UrbanEye: An outdoor localization system for public transport

Verma, R., Shrivastava, A., Mitra, B., Saha, S., Ganguly, N., Nandi, S. & Chakraborty, S., Jul 27 2016, IEEE INFOCOM 2016 - 35th Annual IEEE International Conference on Computer Communications. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-July. 7524393

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Travel time
Anchors
Data structures
Experiments
2015
23 Citations (Scopus)

A predictable and command-level priority-based DRAM controller for mixed-criticality systems

Kim, H., Bromany, D., Lee, E. A., Zimmer, M., Shrivastava, A. & Oh, J., May 14 2015, Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-May. p. 317-326 10 p. 7108455

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Dynamic random access storage
Controllers
Data storage equipment
Time division multiplexing
Simulators
7 Citations (Scopus)

A software scheme for multithreading on CGRAs

Pager, J., Jeyapaul, R. & Shrivastava, A., Jan 1 2015, In : ACM Transactions on Embedded Computing Systems. 14, 1, 19.

Research output: Contribution to journalArticle

Particle accelerators
Patient monitoring
Multitasking
Coprocessor
Sensor nodes
5 Citations (Scopus)

Efficient code assignment techniques for local memory on software managed multicores

Lu, J., Bai, K. & Shrivastava, A., Dec 1 2015, In : ACM Transactions on Embedded Computing Systems. 14, 4, 71.

Research output: Contribution to journalArticle

Data storage equipment
Costs

Enabling multi-threaded applications on hybrid shared memory manycore architectures

Rawat, T. & Shrivastava, A., Apr 22 2015, Proceedings -Design, Automation and Test in Europe, DATE. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-April. p. 742-747 6 p. 7092485

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Memory architecture
Data storage equipment
Dynamic random access storage
Static random access storage
Computer hardware
8 Citations (Scopus)

Guidelines to design parity protected write-back L1 data cache

Ko, Y., Jeyapaul, R., Kim, Y., Lee, K. & Shrivastava, A., Jul 24 2015, Proceedings - Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-July. 7167208

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cache
Parity
Coding errors
Soft Error
Granularity
1 Citation (Scopus)

Optimization of multi-channel BCH error decoding for common cases

Dill, R., Shrivastava, A. & Oh, H., Nov 10 2015, 2015 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2015. Institute of Electrical and Electronics Engineers Inc., p. 59-68 10 p. 7324546

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decoding
Hardware
Polynomials
Error correction
Throughput

Optimized Multi-Channel BCH Decoder

Shrivastava, A., Jun 11 2015

Research output: Patent

Hardware
Decoding
Throughput
Clocks
Controllers
6 Citations (Scopus)

Path selection based acceleration of conditionals in CGRAs

Radhika, S. H. R., Shrivastava, A. & Hamzeh, M., Apr 22 2015, Proceedings -Design, Automation and Test in Europe, DATE. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-April. p. 121-126 6 p. 7092369

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Flow control
Particle accelerators
Electric power utilization
Energy utilization
Bandwidth
2014
12 Citations (Scopus)

Branch-aware loop mapping on CGRAs

Hamzeh, M., Shrivastava, A. & Vrudhula, S., 2014, Proceedings - Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., 2593100

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Reconfigurable architectures
Branch
Reconfigurable Architectures
Compiler
Particle accelerators
2 Citations (Scopus)

Construction of GCCFG for inter-procedural optimizations in Software Managed Manycore (SMM) architectures

Holton, B., Bai, K., Shrivastava, A. & Ramaprasad, H., Oct 12 2014, 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2014. Association for Computing Machinery, Inc

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Flow graphs
Data storage equipment
Flow control
Flow graphs
Data structures
Flow control
Data storage equipment
Information management
Particle accelerators
Energy utilization
Flow graphs
Supercomputers
Data structures