• 1203 Citations
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20002021
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Research Output 2000 2019

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Conference contribution
2019

RIM: Robust Intersection Management for Connected Autonomous Vehicles

Khayatian, M., Mehrabian, M. & Shrivastava, A., Jan 4 2019, Proceedings - 39th IEEE Real-Time Systems Symposium, RTSS 2018. Institute of Electrical and Electronics Engineers Inc., p. 35-44 10 p. 8603190. (Proceedings - Real-Time Systems Symposium; vol. 2018-December).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Reaction injection molding
Managers
Throughput
Trajectories
2018
1 Citation (Scopus)

An efficient timestamp-based monitoring approach to test timing constraints of cyber-physical systems

Mehrabian, M., Khayatian, M., Mousa, A., Shrivastava, A., Li-Baboud, Y. S., Derler, P., Griffor, E., Andrade, H. A., Wiess, M., Eidson, J. C. & Anand, D., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., Vol. Part F137710. a144

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Timestamp
Timing
Monitoring
Resources
Signal sampling

Expert: Effective and flexible error protection by redundant multithreading

So, H., Didehban, M., Ko, Y., Shrivastava, A. & Lee, K., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 533-538 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Data storage equipment
Microprocessor chips
Thread
Experiments
1 Citation (Scopus)

LASER: A hardware/software approach to accelerate complicated loops on CGRAs

Balasubramanian, M., Dave, S., Shrivastava, A. & Jeyapaul, R., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 1069-1074 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Computer hardware
Particle accelerators
Decoding
Energy utilization

RAMP: Resource-aware mapping for CGRAs

Dave, S., Balasubramanian, M. & Shrivastava, A., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., Vol. Part F137710. a127

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routing
Resources
Scheduling
Accelerate
Rescheduling

URECA: Unified register file for CGRAs

Dave, S., Balasubramanian, M. & Shrivastava, A., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 1081-1086 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Energy utilization
2017
2 Citations (Scopus)

Crossroads: Time-Sensitive Autonomous Intersection Management Technique

Andert, E., Khayatian, M. & Shrivastava, A., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., Vol. Part 128280. 50

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Intersection
Buffer
Managers
Throughput
Safety
3 Citations (Scopus)

InCheck: An In-Application Recovery Scheme for Soft Errors

Didehban, M., Lokam, S. R. D. & Shrivastava, A., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., Vol. Part 128280. 40

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Soft Error
Recovery
Coverage
Hardware
Error Recovery
3 Citations (Scopus)

INVITED: A Testbed to Verify the Timing Behavior of Cyber-Physical Systems: Invited

Shrivastava, A., Mehrabian, M., Khayatian, M., Derler, P., Andrade, H., Stanton, K., Li-Baboud, Y. S., Griffor, E., Weiss, M. & Eidson, J., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., Vol. Part 128280. 69

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Testbeds
Testbed
Timing
Verify
Cyber Physical System
2 Citations (Scopus)

NEMESIS: A software approach for computing in presence of soft errors

Didehban, M., Shrivastava, A. & Lokam, S. R. D., Dec 13 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-November. p. 297-304 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Recovery
Error detection
Microprocessor chips
Hardware
Data storage equipment

Reducing code management overhead in software-managed multicores

Cai, J., Kim, Y., Kim, Y., Shrivastava, A. & Lee, K., May 11 2017, Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017. Institute of Electrical and Electronics Engineers Inc., p. 1241-1244 4 p. 7927179

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Software architecture
Computer hardware
Scalability
Experiments
2016

Efficient pointer management of stack data for software managed multicores

Cai, J. & Shrivastava, A., Nov 28 2016, 2016 IEEE 27th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2016. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-November. p. 67-74 8 p. 7760774

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Information management
Computer hardware
Experiments
2 Citations (Scopus)

GemV: A validated toolset for the early exploration of system reliability

Tanikella, K., Koy, Y., Jeyapaul, R., Lee, K. & Shrivastava, A., Nov 28 2016, 2016 IEEE 27th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2016. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-November. p. 159-163 5 p. 7760786

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Analytical models
Experiments
1 Citation (Scopus)

Languages must expose memory heterogeneity

Guo, X., Shrivastava, A., Spear, M. & Tan, G., Oct 3 2016, MEMSYS 2016 - Proceedings of the International Symposium on Memory Systems. Association for Computing Machinery, Vol. 03-06-October-2016. p. 251-256 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Computer programming languages
Computer hardware
Explosions
1 Citation (Scopus)

Margdarshak: A mobile data analytics based commute time estimator cum route recommender

Verma, R., Shrivastava, A., Chakraborty, S. & Mitra, B., Jun 26 2016, WPA 2016 - Proceedings of the 3rd International Workshop on Physical Analytics, co-located with MobiSys 2016. Association for Computing Machinery, Inc, p. 31-36 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Traffic signals
Navigation systems
Traffic congestion
Travel time
Error analysis
15 Citations (Scopus)

NZDC: A compiler technique for near zero silent data corruption

Didehban, M. & Shrivastava, A., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., Vol. 05-09-June-2016. a48

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Soft Error
Compiler
Zero
Duplication
Fault Injection
2 Citations (Scopus)

Software Coherence Management on Non-coherent Cache Multi-cores

Cai, J. & Shrivastava, A., Mar 16 2016, Proceedings of the IEEE International Conference on VLSI Design. IEEE Computer Society, Vol. 2016-March. p. 397-402 6 p. 7434986

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Parallel programming
Dynamic mechanical analysis
Signal processing
Electric power utilization
2 Citations (Scopus)

Splitting functions in code management on scratchpad memories

Kim, Y., Cai, J., Kim, Y., Lee, K. & Shrivastava, A., Nov 7 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2016. Institute of Electrical and Electronics Engineers Inc., Vol. 07-10-November-2016. 2967075

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Block codes
Scalability
Energy utilization
5 Citations (Scopus)

Time in cyber-physical systems

Shrivastava, A., Derler, P., Baboud, Y. S. L., Stanton, K., Khayatian, M., Andrade, H. A., Weiss, M., Eidson, J. & Chandhoke, S., Nov 21 2016, 2016 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2016. Institute of Electrical and Electronics Engineers Inc., 7750983

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cyber Physical System
Clocks
Actuators
Automation
Systems analysis
5 Citations (Scopus)

Towards a reconfigurable distributed testbed to enable advanced research and development of timing and synchronization in cyber-physical systems

Andrade, H. A., Derler, P., Eidson, J. C., Li-Baboud, Y. S., Shrivastava, A., Stanton, K. & Weiss, M., Jan 25 2016, 2015 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015. Institute of Electrical and Electronics Engineers Inc., 7393352

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Testbeds
Microprocessor chips
Synchronization
Application specific integrated circuits
Conceptual design
3 Citations (Scopus)

Unsupervised annotated city traffic map generation

Verma, R., Ghosh, S., Shrivastava, A., Ganguly, N., Mitra, B. & Chakraborty, S., Oct 31 2016, 24th ACM SIGSPATIAL International Conference on Advances in Geographic Information Systems, ACM SIGSPATIAL GIS 2016. Association for Computing Machinery, 59

Research output: Chapter in Book/Report/Conference proceedingConference contribution

India
Traffic
CAN Bus
Leverage
Repository
12 Citations (Scopus)

UrbanEye: An outdoor localization system for public transport

Verma, R., Shrivastava, A., Mitra, B., Saha, S., Ganguly, N., Nandi, S. & Chakraborty, S., Jul 27 2016, IEEE INFOCOM 2016 - 35th Annual IEEE International Conference on Computer Communications. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-July. 7524393

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Travel time
Anchors
Data structures
Experiments
2015
22 Citations (Scopus)

A predictable and command-level priority-based DRAM controller for mixed-criticality systems

Kim, H., Bromany, D., Lee, E. A., Zimmer, M., Shrivastava, A. & Oh, J., May 14 2015, Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-May. p. 317-326 10 p. 7108455

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Dynamic random access storage
Controllers
Data storage equipment
Time division multiplexing
Simulators

Enabling multi-threaded applications on hybrid shared memory manycore architectures

Rawat, T. & Shrivastava, A., Apr 22 2015, Proceedings -Design, Automation and Test in Europe, DATE. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-April. p. 742-747 6 p. 7092485

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Memory architecture
Data storage equipment
Dynamic random access storage
Static random access storage
Computer hardware
6 Citations (Scopus)

Guidelines to design parity protected write-back L1 data cache

Ko, Y., Jeyapaul, R., Kim, Y., Lee, K. & Shrivastava, A., Jul 24 2015, Proceedings - Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-July. 7167208

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cache
Parity
Coding errors
Soft Error
Granularity
1 Citation (Scopus)

Optimization of multi-channel BCH error decoding for common cases

Dill, R., Shrivastava, A. & Oh, H., Nov 10 2015, 2015 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2015. Institute of Electrical and Electronics Engineers Inc., p. 59-68 10 p. 7324546

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Decoding
Hardware
Polynomials
Error correction
Throughput
6 Citations (Scopus)

Path selection based acceleration of conditionals in CGRAs

Radhika, S. H. R., Shrivastava, A. & Hamzeh, M., Apr 22 2015, Proceedings -Design, Automation and Test in Europe, DATE. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-April. p. 121-126 6 p. 7092369

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Flow control
Particle accelerators
Electric power utilization
Energy utilization
Bandwidth
2014
12 Citations (Scopus)

Branch-aware loop mapping on CGRAs

Hamzeh, M., Shrivastava, A. & Vrudhula, S., 2014, Proceedings - Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., 2593100

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Reconfigurable architectures
Branch
Reconfigurable Architectures
Compiler
Particle accelerators
2 Citations (Scopus)

Construction of GCCFG for inter-procedural optimizations in Software Managed Manycore (SMM) architectures

Holton, B., Bai, K., Shrivastava, A. & Ramaprasad, H., Oct 12 2014, 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2014. Association for Computing Machinery, Inc

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Flow graphs
Data storage equipment
Flow control
13 Citations (Scopus)

Quantitative analysis of control flow checking mechanisms for soft errors

Shrivastava, A., Rhisheekesan, A., Jeyapaul, R. & Wu, C-J., 2014, Proceedings - Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., 2593195

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Soft Error
Flow Control
Quantitative Analysis
Flow control
Chemical analysis
2013
16 Citations (Scopus)

Automatic and efficient heap data management for limited local memory multicore architectures

Bai, K. & Shrivastava, A., 2013, Proceedings -Design, Automation and Test in Europe, DATE. p. 593-598 6 p. 6513576

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Information management
Data storage equipment
Computer programming
Data structures
Electric power utilization
13 Citations (Scopus)

CMSM: An efficient and effective code management for software managed multicores

Bai, K., Lu, J., Shrivastava, A. & Holton, B., 2013, 2013 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2013. IEEE Computer Society, 6658998

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Information management
Costs
12 Citations (Scopus)

Precision timed infrastructure: Design challenges

Broman, D., Zimmer, M., Kim, Y., Kim, H., Cai, J., Shrivastava, A., Edwards, S. A. & Lee, E. A., 2013, Proceedings of the electronic system level synthesis conference. 6573221

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Semantics
Avionics
Application programs
Automobiles
Hardware
38 Citations (Scopus)

REGIMap: Register-aware application mapping on coarse-grained reconfigurable architectures (CGRAs)

Hamzeh, M., Shrivastava, A. & Vrudhula, S., 2013, Proceedings - Design Automation Conference. 18

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Reconfigurable architectures
Reconfigurable Architectures
Compiler
Heuristics
Compilation
22 Citations (Scopus)

SSDM: Smart stack data management for software managed multicores (SMMs)

Lu, J., Bai, K. & Shrivastava, A., 2013, Proceedings - Design Automation Conference. 149

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data Management
Information management
Software
Inductive logic programming (ILP)
Data storage equipment
2012
4 Citations (Scopus)

Design of an RNS reverse converter for a new five-moduli special set

Patronik, P., Berezowski, K., Biernat, J., Piestrak, S. J. & Shrivastava, A., 2012, Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI. p. 67-70 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Numbering systems
Microelectronics
Electric power utilization
65 Citations (Scopus)

EPIMap: Using epimorphism to map applications on CGRAs

Hamzeh, M., Shrivastava, A. & Vrudhula, S., 2012, Proceedings - Design Automation Conference. p. 1284-1291 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Reconfigurable architectures
Reconfigurable Architectures
Epimorphism
Benchmark
Compiler
2011
1 Citation (Scopus)

Adaptive reduced bit-width Instruction Set Architecture (adapt-rISA)

Neves Soares, S., Halambi, A., Shrivastava, A., Wagner, F. R. & Dutt, N., 2011, Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009. p. 47-52 6 p. 6041329

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Embedded systems
Data storage equipment
Experiments
3 Citations (Scopus)

Branch penalty reduction on IBM cell SPUs via software branch hinting

Lu, J., Kim, Y., Shrivastava, A. & Huang, C., 2011, Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 9th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS'11. p. 355-364 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Processing
29 Citations (Scopus)

CuMAPz: A tool to analyze memory access patterns in CUDA

Kim, Y. & Shrivastava, A., 2011, Proceedings - Design Automation Conference. p. 128-133 6 p. 5981927

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Data Reuse
GPGPU
Memory Effect
Shared Memory
5 Citations (Scopus)

Enabling multithreading on CGRAs

Shrivastava, A., Pager, J., Jeyapaul, R., Hamzeh, M. & Vrudhula, S., 2011, Proceedings of the International Conference on Parallel Processing. p. 255-264 10 p. 6047194

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Multithreading
Particle accelerators
Accelerator
Embedded systems
Thread
12 Citations (Scopus)

Fast and energy-efficient constant-coefficient FIR filters using residue number system

Patronik, P., Berezowski, K., Piestrak, S. J., Biernat, J. & Shrivastava, A., 2011, Proceedings of the International Symposium on Low Power Electronics and Design. p. 385-390 6 p. 5993671

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Numbering systems
FIR filters
Electric power utilization
Hardware
Pipelines
4 Citations (Scopus)

LA-LRU: A latency-aware replacement policy for variation tolerant caches

Jain, A., Shrivastava, A. & Chakrabarti, C., 2011, Proceedings of the IEEE International Conference on VLSI Design. p. 298-303 6 p. 5718818

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Integrated circuits
Electric power utilization
Semiconductor materials
Fabrication
6 Citations (Scopus)

Smart cache cleaning: Energy efficient vulnerability reduction in embedded processors

Jeyapaul, R. & Shrivastava, A., 2011, Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11. p. 105-114 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cleaning
Data storage equipment
Copying
Transistors
Hardware
16 Citations (Scopus)

Stack data management for Limited Local Memory (LLM) multi-core processors

Bai, K., Shrivastava, A. & Kudchadker, S., 2011, Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors. p. 231-234 4 p. 6043275

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Information management
Data storage equipment
Memory architecture
Data transfer
2 Citations (Scopus)

UnSync: A soft error resilient redundant multicore architecture

Jeyapaul, R., Hong, F., Rhisheekesan, A., Shrivastava, A. & Lee, K., 2011, Proceedings of the International Conference on Parallel Processing. p. 632-641 10 p. 6047231

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Soft Error
Hardware
Chip multiprocessors
Redundancy
Transistors
11 Citations (Scopus)

Vector class on Limited Local Memory (LLM) multi-core processors

Bai, K., Lu, D. & Shrivastava, A., 2011, Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11. p. 215-224 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Memory architecture
Data transfer
Containers
2010
1 Citation (Scopus)

B2P2: Bounds Based Procedure Placement for instruction TLB power reduction in embedded systems

Jeyapaul, R. & Shrivastava, A., 2010, Proceedings of the 13th International Workshop on Software and Compilers for Embedded Systems, SCOPES 2010. 2

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Embedded systems
Switches
Computational complexity
Electric power utilization
Data storage equipment
9 Citations (Scopus)

Cache vulnerability equations for protecting data in embedded processor caches from soft errors

Shrivastava, A., Lee, J. & Jeyapaul, R., 2010, Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES). p. 143-152 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Static analysis
Cosmic rays
Transistors
Fabrication
Networks (circuits)
1 Citation (Scopus)

Compilation techniques for CGRAs: Exploring all parallelization approaches

Vander Aa, T., Raghavan, P., Mahlke, S., De Sutter, B., Shrivastava, A. & Hannig, F., 2010, Embedded Systems Week 2010 - Proceedings of the 8th IEEE/ACM/IFIP International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CODES+ISSS'2010. p. 185-186 2 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Embedded systems
Industrial research
Computer hardware
Hardware