Research Output per year
Personal profile
Education/Academic qualification
PHD, University of California-Irvine
… → 2006
MS, University of California-Irvine
… → 2002
BS, Indian Institute of Technology Guwahati
… → 1999
Fingerprint Fingerprint is based on mining the text of the experts' scientific documents to create an index of weighted terms, which defines the key subjects of each individual researcher.
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Electric power utilization
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Information management
Engineering & Materials Science
Energy utilization
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Soft Error
Mathematics
Network
Recent external collaboration on country level. Dive into details by clicking on the dots.
Research Output 2000 2018
A Compiler Technique for Processor-Wide Protection From Soft Errors in Multithreaded Environments
Didehban, M. & Shrivastava, A., Feb 9 2018, (Accepted/In press) In : IEEE Transactions on Reliability.Research output: Contribution to journal › Article
Microprocessor chips
Transistors
Data storage equipment
Experiments
An efficient timestamp-based monitoring approach to test timing constraints of cyber-physical systems
Mehrabian, M., Khayatian, M., Mousa, A., Shrivastava, A., Li-Baboud, Y. S., Derler, P., Griffor, E., Andrade, H. A., Wiess, M., Eidson, J. C. & Anand, D., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., Vol. Part F137710. a144Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Timestamp
Timing
Monitoring
Resources
Signal sampling
Expert: Effective and flexible error protection by redundant multithreading
So, H., Didehban, M., Ko, Y., Shrivastava, A. & Lee, K., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 533-538 6 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Hardware
Data storage equipment
Microprocessor chips
Thread
Experiments
Guest editorial: Special issue on accelerated computing
Shrivastava, A. & Kurdahi, F. J., Jan 1 2018, In : IEEE Transactions on Multi-Scale Computing Systems. 4, 1, p. 1-2 2 p.Research output: Contribution to journal › Editorial
1
Citations
LASER: A hardware/software approach to accelerate complicated loops on CGRAs
Balasubramanian, M., Dave, S., Shrivastava, A. & Jeyapaul, R., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 1069-1074 6 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Hardware
Computer hardware
Particle accelerators
Decoding
Energy utilization
Projects 2007 2021
Intel-ASU A-SPACE Initiative: Proposed Research Tasks
Karam, L., Bazzi, R., Marchant, G., Shrivastava, A., Fainekos, G., Mayyas, A. & Ben Amor, H.
5/1/18 → 4/30/21
Project: Research project
NSF: CAPA: Collaborative Research: Lightweight Abstract Memory Features
NSF-CISE: Computing and Communication Foundations (CCF)
9/1/17 → 8/31/20
Project: Research project
Intel: CAPA: Collaborative Research: Lightweight Abstract Memory Features (ASUF 30007811)
9/1/17 → 8/31/20
Project: Research project
Parallelism and Concurrency with Xeon Phi: Educational and research support (ASUF 30006830)
Dasgupta, P. & Shrivastava, A.
10/1/15 → 6/30/21
Project: Research project
CES Manager Account: Consortium for Embedded Systems
Vrudhula, S., Candan, K., Lee, Y., Gupta, S., Barnaby, H., Huang, D., Shrivastava, A., Fainekos, G., Wu, C. & Yu, S.
INDUSTRY: Various Consortium Members
9/1/07 → 3/31/19
Project: Research project
Embedded systems
Managers
Data storage equipment
Threshold logic
Temporal logic