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Personal profile

Education/Academic qualification

PHD, University of California-Irvine

… → 2006

MS, University of California-Irvine

… → 2002

BS, Indian Institute of Technology Guwahati

… → 1999

Fingerprint Fingerprint is based on mining the text of the experts' scientific documents to create an index of weighted terms, which defines the key subjects of each individual researcher.

  • 18 Similar Profiles
Data storage equipment Engineering & Materials Science
Hardware Engineering & Materials Science
Embedded systems Engineering & Materials Science
Reconfigurable architectures Engineering & Materials Science
Electric power utilization Engineering & Materials Science
Information management Engineering & Materials Science
Energy utilization Engineering & Materials Science
Soft Error Mathematics

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Research Output 2000 2019

A dependable detection mechanism for intersection management of Connected Autonomous Vehicles

Dedinsky, R., Khayatian, M., Mehrabian, M. & Shrivastava, A., Mar 1 2019, In : OpenAccess Series in Informatics. 68, 7.

Research output: Contribution to journalConference article

Autonomous Vehicles
Intersection
manager
Managers
management

Control flow checking or not? (for Soft Errors)

Rhisheekesan, A., Jeyapaul, R. & Shrivastava, A., Feb 1 2019, In : ACM Transactions on Embedded Computing Systems. 18, 1, 11.

Research output: Contribution to journalArticle

Flow control
Chlorofluorocarbons
Hardware
Chemical analysis
Costs

RIM: Robust Intersection Management for Connected Autonomous Vehicles

Khayatian, M., Mehrabian, M. & Shrivastava, A., Jan 4 2019, Proceedings - 39th IEEE Real-Time Systems Symposium, RTSS 2018. Institute of Electrical and Electronics Engineers Inc., p. 35-44 10 p. 8603190. (Proceedings - Real-Time Systems Symposium; vol. 2018-December).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Reaction injection molding
Managers
Throughput
Trajectories

A Compiler Technique for Processor-Wide Protection From Soft Errors in Multithreaded Environments

Didehban, M. & Shrivastava, A., Feb 9 2018, (Accepted/In press) In : IEEE Transactions on Reliability.

Research output: Contribution to journalArticle

Microprocessor chips
Transistors
Data storage equipment
Experiments
1 Citation (Scopus)

An efficient timestamp-based monitoring approach to test timing constraints of cyber-physical systems

Mehrabian, M., Khayatian, M., Mousa, A., Shrivastava, A., Li-Baboud, Y. S., Derler, P., Griffor, E., Andrade, H. A., Wiess, M., Eidson, J. C. & Anand, D., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., Vol. Part F137710. a144

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Timestamp
Timing
Monitoring
Resources
Signal sampling

Projects 2007 2021