Loop-based interconnect modeling and optimization approach for multigigahertz clock network design

Xuejue Huang, Phillip Restle, Thomas Bucelot, Yu Cao, Tsu Jae King, Chenming Hu

Research output: Contribution to journal › Article › peer-review

24 Scopus citations

Fingerprint

Dive into the research topics of 'Loop-based interconnect modeling and optimization approach for multigigahertz clock network design'. Together they form a unique fingerprint.

Engineering & Materials Science