TY - JOUR
T1 - Worst-case satisfaction of STL specifications using feedforward neural network controllers
T2 - A lagrange multipliers approach
AU - Yaghoubi, Shakiba
AU - Fainekos, Georgios
N1 - Publisher Copyright:
© 2019 Association for Computing Machinery.
PY - 2019/10
Y1 - 2019/10
N2 - In this paper, a reinforcement learning approach for designing feedback neural network controllers for nonlinear systems is proposed. Given a Signal Temporal Logic (STL) specification which needs to be satisfied by the system over a set of initial conditions, the neural network parameters are tuned in order to maximize the satisfaction of the STL formula. The framework is based on a max-min formulation of the robustness of the STL formula. The maximization is solved through a Lagrange multipliers method, while the minimization corresponds to a falsification problem. We present our results on a vehicle and a quadrotor model and demonstrate that our approach reduces the training time more than 50 percent compared to the baseline approach.
AB - In this paper, a reinforcement learning approach for designing feedback neural network controllers for nonlinear systems is proposed. Given a Signal Temporal Logic (STL) specification which needs to be satisfied by the system over a set of initial conditions, the neural network parameters are tuned in order to maximize the satisfaction of the STL formula. The framework is based on a max-min formulation of the robustness of the STL formula. The maximization is solved through a Lagrange multipliers method, while the minimization corresponds to a falsification problem. We present our results on a vehicle and a quadrotor model and demonstrate that our approach reduces the training time more than 50 percent compared to the baseline approach.
KW - Neural network controller
KW - Reinforcement learning
KW - Signal temporal logic
UR - http://www.scopus.com/inward/record.url?scp=85073161036&partnerID=8YFLogxK
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U2 - 10.1145/3358239
DO - 10.1145/3358239
M3 - Article
AN - SCOPUS:85073161036
SN - 1539-9087
VL - 18
JO - ACM Transactions on Embedded Computing Systems
JF - ACM Transactions on Embedded Computing Systems
IS - 5s
M1 - a107
ER -