Workload-aware neuromorphic design of low-power supply voltage controller

Saurabh Sinha, Jounghyuk Suh, Bertan Bakkaloglu, Yu Cao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

A workload-aware low-power neuromorphic controller for dynamic voltage scaling in VLSI systems is presented. The neuromorphic controller predicts future workload values and preemptively regulates supply voltage based on past work- load profile. Our specific contributions include: (1) implementation of a digital and analog version of the controllerin 45nm CMOS technology, resulting in 3% performance hit with a power overhead in the range of 10-150 microwatts, (2) higher prediction accuracy compared to a software based OS-governed DVS scheme by 50%, reducing wasted power and improving error margins, (3) digital design has minimal power overhead and is more reconfigurable, while analog design is better suited for nonlinear and complex computational tasks.

Original languageEnglish (US)
Title of host publicationProceedings of the International Symposium on Low Power Electronics and Design
Pages241-246
Number of pages6
DOIs
Publication statusPublished - 2010
Event16th ACM/IEEE International Symposium on Low-Power Electronics and Design, ISLPED'10 - Austin, TX, United States
Duration: Aug 18 2010Aug 20 2010

Other

Other16th ACM/IEEE International Symposium on Low-Power Electronics and Design, ISLPED'10
CountryUnited States
CityAustin, TX
Period8/18/108/20/10

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Keywords

  • DVS
  • Neuromorphic engineering
  • Spiking neurons

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Sinha, S., Suh, J., Bakkaloglu, B., & Cao, Y. (2010). Workload-aware neuromorphic design of low-power supply voltage controller. In Proceedings of the International Symposium on Low Power Electronics and Design (pp. 241-246) https://doi.org/10.1145/1840845.1840896