True energy-performance analysis of the MTJ-based logic-in-memory architecture (1-bit full adder)

Fengbo Ren, Dejan Marković

Research output: Contribution to journalArticle

61 Citations (Scopus)

Abstract

The use of spin-transfer torque (STT) devices for memory design has been a subject of research since the discovery of the STT on MgO-based magnetic tunnel junctions (MTJs). Recently, MTJ-based computing architectures such as logic-in-memory have been proposed and claim superior energy-delay performance over static CMOS. In this paper, we conduct exhaustive energy-performance analysis of an STT-MTJ-based logic-in-memory (LIM-MTJ) 1-bit full adder and compare it with its corresponding CMOS counterpart. Our results show that the LIM-MTJ circuit has no advantage in energy-performance over its equivalent CMOS designs. We also show that the MTJ-based logic circuit requiring frequent MTJ switching during the operation is hardly power efficient.

Original languageEnglish (US)
Article number12
Pages (from-to)1023-1028
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume57
Issue number5
DOIs
StatePublished - May 2010
Externally publishedYes

Fingerprint

Memory architecture
Tunnel junctions
Adders
Torque
Data storage equipment
Logic circuits
Networks (circuits)

Keywords

  • Adders
  • Complimentary metal-oxide-semiconductor (CMOS) digital integrated circuits
  • Energy-delay tradeoff
  • Magnetic tunnel junction (MTJ) logic
  • Spin-transfer torque (STT) devices

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

True energy-performance analysis of the MTJ-based logic-in-memory architecture (1-bit full adder). / Ren, Fengbo; Marković, Dejan.

In: IEEE Transactions on Electron Devices, Vol. 57, No. 5, 12, 05.2010, p. 1023-1028.

Research output: Contribution to journalArticle

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