TY - GEN
T1 - Throughput of multi-core processors under thermal constraints
AU - Rao, Ravishankar
AU - Vrudhula, Sarma
AU - Chakrabarti, Chaitali
PY - 2007
Y1 - 2007
N2 - We analyze the effect of thermal constraints on the performance and power of multi-core processors. We propose system-level power and thermal models, and derive expressions for (a) the maximum number of cores that can be activated, with and without throttling, (b) the speedup (multi-core over single core), and the total power consumption, both as functions of the number of active cores. These expressions involve parameters like power per core, thermal resistance of hottest die block and package, and leakage dependence on temperature. We also computed the above metrics (a) and (b) numerically by solving the detailed Hotspot circuit of an multicore processor driven by a block-level exponential temperaturedependent leakage model. When compared to these numerical results, we found that the above expressions for (a) were at most 8% underpredicted, while those for (b) were accurately predicted. The proposed analytical approach is the first of its kind to relate metrics of interest in multi-core processors to high-level design parameters. Compared to numerical approaches, it provides much faster computation time, and valuable insight for processor designers.
AB - We analyze the effect of thermal constraints on the performance and power of multi-core processors. We propose system-level power and thermal models, and derive expressions for (a) the maximum number of cores that can be activated, with and without throttling, (b) the speedup (multi-core over single core), and the total power consumption, both as functions of the number of active cores. These expressions involve parameters like power per core, thermal resistance of hottest die block and package, and leakage dependence on temperature. We also computed the above metrics (a) and (b) numerically by solving the detailed Hotspot circuit of an multicore processor driven by a block-level exponential temperaturedependent leakage model. When compared to these numerical results, we found that the above expressions for (a) were at most 8% underpredicted, while those for (b) were accurately predicted. The proposed analytical approach is the first of its kind to relate metrics of interest in multi-core processors to high-level design parameters. Compared to numerical approaches, it provides much faster computation time, and valuable insight for processor designers.
KW - Leakage dependence on temperature
KW - Multi-core processors
KW - Power
KW - Speedup
KW - Thermal management
KW - Throughput
UR - http://www.scopus.com/inward/record.url?scp=36949038698&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=36949038698&partnerID=8YFLogxK
U2 - 10.1145/1283780.1283824
DO - 10.1145/1283780.1283824
M3 - Conference contribution
AN - SCOPUS:36949038698
SN - 1595937099
SN - 9781595937094
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
SP - 201
EP - 206
BT - ISLPED'07
T2 - ISLPED'07: 2007 International Symposium on Low Power Electronics and Design
Y2 - 27 August 2007 through 29 August 2007
ER -