TY - GEN
T1 - Task scheduling of control-data flow graphs for reconfigurable architectures
AU - Sudarsanam, Arvind
AU - Aravind, Dasu
AU - Panchanathan, Sethuraman
PY - 2004
Y1 - 2004
N2 - Task scheduling is an essential part of the design cycle of a reconfigurable hardware implementation for a given application. Most of the current multimedia applications provide a large amount of variations to users and hence are control dominated. To arrive at an optimal schedule for such applications would involve a highly complex scheduling algorithm. This paper proposes a low complexity scheduling algorithm that provides a near optimal solution. Existing approaches suggest that Branch and Bound method of scheduling gives the most optimal solution, but at the same time is highly complex. Our approach introduces the concept of an enhanced Partial Critical Path. Our scheduling algorithm generates near-optimal solution at O(n) complexity. Branch and Bound algorithm can be run selectively to approach optimality, thus reducing the overall complexity. Special cases involving loops have also been addressed. The effect of reconfiguration on the schedule has been analyzed and a solution has been proposed.
AB - Task scheduling is an essential part of the design cycle of a reconfigurable hardware implementation for a given application. Most of the current multimedia applications provide a large amount of variations to users and hence are control dominated. To arrive at an optimal schedule for such applications would involve a highly complex scheduling algorithm. This paper proposes a low complexity scheduling algorithm that provides a near optimal solution. Existing approaches suggest that Branch and Bound method of scheduling gives the most optimal solution, but at the same time is highly complex. Our approach introduces the concept of an enhanced Partial Critical Path. Our scheduling algorithm generates near-optimal solution at O(n) complexity. Branch and Bound algorithm can be run selectively to approach optimality, thus reducing the overall complexity. Special cases involving loops have also been addressed. The effect of reconfiguration on the schedule has been analyzed and a solution has been proposed.
UR - http://www.scopus.com/inward/record.url?scp=12744262156&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=12744262156&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:12744262156
SN - 1932415424
SN - 9781932415421
T3 - Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'04
SP - 225
EP - 231
BT - Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'04
A2 - Plaks, T.P.
T2 - Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'04
Y2 - 21 June 2004 through 24 June 2004
ER -