System-level test synthesis for mixed-signal designs

Hierarchical test approaches are a must for large designs due to the computational complexity and tight time-to-market requirements. In hierarchical test synthesis, test design is conducted at a subsystem level where the design complexity is manageable. For analog systems, tests are generally designed at the basic block level. This paper outlines a tool for translating basic block-level tests into system-level tests for large analog systems. Computational effectiveness is achieved by the use of high level models and by a pre-analysis of the system to identify feasible translation paths. A method to compute the fault and yield coverages of the resultant system-level tests is also provided in order to evaluate the translation. Experimental results show that test translation reduces design for testability overhead significantly while satisfying coverage requirements.