TY - GEN
T1 - Statistical prediction of NBTI-induced circuit aging
AU - Wang, Wenping
AU - Balakrishnan, Varsha
AU - Yang, Bo
AU - Cao, Yu
N1 - Copyright:
Copyright 2010 Elsevier B.V., All rights reserved.
PY - 2008
Y1 - 2008
N2 - Accurate prediction of circuit aging and its variability is essential to reliable design and analysis. Such a capability further helps reduce the load in statistical reliability test. Based on the physical understanding of circuit aging effects, we develop a predictive short term and long term model to characterize NBTI-induced threshold voltage degradation (ΔVth) at transistor level. Due to process variations, we further develop analytical solutions that efficiently predict the statistics of circuit timing under temporal stress and process variations. These solutions prove that circuit aging and its variance can be fully predicted from the characteristics of transistor degradation and circuit performance sensitivity to aged parameters, independent on the type and the amount of process variations. The results are systematically validated by simulation and measurement data from an industrial 65nm technology, enhancing the predictability and efficiency of statistical reliability analysis.
AB - Accurate prediction of circuit aging and its variability is essential to reliable design and analysis. Such a capability further helps reduce the load in statistical reliability test. Based on the physical understanding of circuit aging effects, we develop a predictive short term and long term model to characterize NBTI-induced threshold voltage degradation (ΔVth) at transistor level. Due to process variations, we further develop analytical solutions that efficiently predict the statistics of circuit timing under temporal stress and process variations. These solutions prove that circuit aging and its variance can be fully predicted from the characteristics of transistor degradation and circuit performance sensitivity to aged parameters, independent on the type and the amount of process variations. The results are systematically validated by simulation and measurement data from an industrial 65nm technology, enhancing the predictability and efficiency of statistical reliability analysis.
UR - http://www.scopus.com/inward/record.url?scp=60749117261&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=60749117261&partnerID=8YFLogxK
U2 - 10.1109/ICSICT.2008.4734563
DO - 10.1109/ICSICT.2008.4734563
M3 - Conference contribution
AN - SCOPUS:60749117261
SN - 9781424421855
T3 - International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT
SP - 416
EP - 419
BT - ICSICT 2008 - 2008 9th International Conference on Solid-State and Integrated-Circuit Technology Proceedings
T2 - 2008 9th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2008
Y2 - 20 October 2008 through 23 October 2008
ER -