Spice up your MOSFET modelling

Yu Cao; Michael Orshansky; Takashi Sato; Dennis Sylvester; Chenming Hu

doi:10.1109/MCD.2003.1217613

Spice up your MOSFET modelling

Yu Cao, Michael Orshansky, Takashi Sato, Dennis Sylvester, Chenming Hu

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

A customizable and predictive BSIM model was generated for devices with L_eff down to 12 nm and a wide range of interconnect sizes. The main advantages of this approach over previous work were its applicability to generic technologies as well as the ease of use provided by a Web-based distribution model. These predictive technology models will be useful for circuit design research aimed at processes that were not yet available.

Original language	English (US)
Pages (from-to)	17-23
Number of pages	7
Journal	IEEE Circuits and Devices Magazine
Volume	19
Issue number	4
DOIs	https://doi.org/10.1109/MCD.2003.1217613
State	Published - Jul 2003
Externally published	Yes

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Instrumentation
Electrical and Electronic Engineering

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10.1109/MCD.2003.1217613

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title = "Spice up your MOSFET modelling",

abstract = "A customizable and predictive BSIM model was generated for devices with Leff down to 12 nm and a wide range of interconnect sizes. The main advantages of this approach over previous work were its applicability to generic technologies as well as the ease of use provided by a Web-based distribution model. These predictive technology models will be useful for circuit design research aimed at processes that were not yet available.",

author = "Yu Cao and Michael Orshansky and Takashi Sato and Dennis Sylvester and Chenming Hu",

note = "Funding Information: The authors thank Dr. J. Park- hurst, Dr. K. Soumyanath, and Dr. V.K. De for valuable sugges tions to this project. This re search is sponsored by the Semiconductor Research Com mittee (SRC) under SRC 99-NJ-697.",

year = "2003",

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doi = "10.1109/MCD.2003.1217613",

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AU - Cao, Yu

AU - Orshansky, Michael

AU - Sato, Takashi

AU - Sylvester, Dennis

AU - Hu, Chenming

N1 - Funding Information: The authors thank Dr. J. Park- hurst, Dr. K. Soumyanath, and Dr. V.K. De for valuable sugges tions to this project. This re search is sponsored by the Semiconductor Research Com mittee (SRC) under SRC 99-NJ-697.

PY - 2003/7

Y1 - 2003/7

N2 - A customizable and predictive BSIM model was generated for devices with Leff down to 12 nm and a wide range of interconnect sizes. The main advantages of this approach over previous work were its applicability to generic technologies as well as the ease of use provided by a Web-based distribution model. These predictive technology models will be useful for circuit design research aimed at processes that were not yet available.

AB - A customizable and predictive BSIM model was generated for devices with Leff down to 12 nm and a wide range of interconnect sizes. The main advantages of this approach over previous work were its applicability to generic technologies as well as the ease of use provided by a Web-based distribution model. These predictive technology models will be useful for circuit design research aimed at processes that were not yet available.

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Spice up your MOSFET modelling

Abstract

ASJC Scopus subject areas

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