Robust 7-nm SRAM design on a predictive PDK

Vinay Vashishtha; Manoj Vangala; Parv Sharma; Lawrence T. Clark

doi:10.1109/ISCAS.2017.8050316

Robust 7-nm SRAM design on a predictive PDK

Vinay Vashishtha, Manoj Vangala, Parv Sharma, Lawrence T. Clark

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

25 Scopus citations

Abstract

SRAMs are ubiquitous in modern VLSI design but have become difficult to design in advanced finFET processes due to fin quantization and large variability at small geometries. In this paper six transistor SRAM design on a 7-nm predictive PDK is presented. The SRAMs use differential sense amplifier based sensing to support long bit-lines and high array efficiency. Different SRAM cells are evaluated statistically, resulting in the choice of a 122 cell due to its easier lithography and superior write margins. A novel switched capacitor reduced column VDD is presented, which has excellent across corner voltage characteristics and speed. The analysis shows yield to a minimum VDD of 500 mV.

Original language	English (US)
Title of host publication	IEEE International Symposium on Circuits and Systems
Subtitle of host publication	From Dreams to Innovation, ISCAS 2017 - Conference Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781467368520
DOIs	https://doi.org/10.1109/ISCAS.2017.8050316
State	Published - Sep 25 2017
Event	50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States Duration: May 28 2017 → May 31 2017

Other

Other	50th IEEE International Symposium on Circuits and Systems, ISCAS 2017
Country/Territory	United States
City	Baltimore
Period	5/28/17 → 5/31/17

Keywords

finFET
SRAM Statistical Design
Write Assist

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/ISCAS.2017.8050316

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Robust 7-nm SRAM design on a predictive PDK. / Vashishtha, Vinay; Vangala, Manoj; Sharma, Parv et al.
IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. 8050316.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Vashishtha, V, Vangala, M, Sharma, P & Clark, LT 2017, Robust 7-nm SRAM design on a predictive PDK. in IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings., 8050316, Institute of Electrical and Electronics Engineers Inc., 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, United States, 5/28/17. https://doi.org/10.1109/ISCAS.2017.8050316

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Robust 7-nm SRAM design on a predictive PDK

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Keywords

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