Relating data characteristics to transition activity in high-level static CMOS design

Russell Henning, Chaitali Chakrabarti

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Significant power reduction can be obtained in the datapath of a CMOS VLSI circuit if data characteristics are carefully exploited. An improved approach that achieves such reduction by using a new model relating important data characteristics to the transition activity in static CMOS circuits is presented. Specifically, relationships between fixed-point, two's complement data and 0 → 1 transition activity in static CMOS circuits are identified. Models for computing transition activity in terms of a set of statistical parameters are developed, and their performance compared with the Dual Bit Type model. Then the use of the relationships and models to analyze and significantly reduce 0 → 1 transition activity with little computational effort is illustrated by several, high-level synthesis examples.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE International Conference on VLSI Design
Place of PublicationLos Alamitos, CA, United States
PublisherIEEE
Pages38-43
Number of pages6
StatePublished - 2000
EventThe 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium - Calcutta, India
Duration: Jan 3 2000Jan 7 2000

Other

OtherThe 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium
CityCalcutta, India
Period1/3/001/7/00

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Henning, R., & Chakrabarti, C. (2000). Relating data characteristics to transition activity in high-level static CMOS design. In Proceedings of the IEEE International Conference on VLSI Design (pp. 38-43). IEEE.