Relating data characteristics to transition activity in high-level static CMOS design

Russell Henning; Chaitali Chakrabarti

Relating data characteristics to transition activity in high-level static CMOS design

Russell Henning, Chaitali Chakrabarti

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Scopus citations

Abstract

Significant power reduction can be obtained in the datapath of a CMOS VLSI circuit if data characteristics are carefully exploited. An improved approach that achieves such reduction by using a new model relating important data characteristics to the transition activity in static CMOS circuits is presented. Specifically, relationships between fixed-point, two's complement data and 0 → 1 transition activity in static CMOS circuits are identified. Models for computing transition activity in terms of a set of statistical parameters are developed, and their performance compared with the Dual Bit Type model. Then the use of the relationships and models to analyze and significantly reduce 0 → 1 transition activity with little computational effort is illustrated by several, high-level synthesis examples.

Original language	English (US)
Title of host publication	Proceedings of the IEEE International Conference on VLSI Design
Place of Publication	Los Alamitos, CA, United States
Publisher	IEEE
Pages	38-43
Number of pages	6
State	Published - 2000
Event	The 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium - Calcutta, India Duration: Jan 3 2000 → Jan 7 2000

Other

Other	The 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium
City	Calcutta, India
Period	1/3/00 → 1/7/00

ASJC Scopus subject areas

General Engineering

Cite this

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title = "Relating data characteristics to transition activity in high-level static CMOS design",

abstract = "Significant power reduction can be obtained in the datapath of a CMOS VLSI circuit if data characteristics are carefully exploited. An improved approach that achieves such reduction by using a new model relating important data characteristics to the transition activity in static CMOS circuits is presented. Specifically, relationships between fixed-point, two's complement data and 0 → 1 transition activity in static CMOS circuits are identified. Models for computing transition activity in terms of a set of statistical parameters are developed, and their performance compared with the Dual Bit Type model. Then the use of the relationships and models to analyze and significantly reduce 0 → 1 transition activity with little computational effort is illustrated by several, high-level synthesis examples.",

author = "Russell Henning and Chaitali Chakrabarti",

year = "2000",

language = "English (US)",

pages = "38--43",

booktitle = "Proceedings of the IEEE International Conference on VLSI Design",

publisher = "IEEE",

note = "The 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium ; Conference date: 03-01-2000 Through 07-01-2000",

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T1 - Relating data characteristics to transition activity in high-level static CMOS design

AU - Henning, Russell

AU - Chakrabarti, Chaitali

PY - 2000

Y1 - 2000

N2 - Significant power reduction can be obtained in the datapath of a CMOS VLSI circuit if data characteristics are carefully exploited. An improved approach that achieves such reduction by using a new model relating important data characteristics to the transition activity in static CMOS circuits is presented. Specifically, relationships between fixed-point, two's complement data and 0 → 1 transition activity in static CMOS circuits are identified. Models for computing transition activity in terms of a set of statistical parameters are developed, and their performance compared with the Dual Bit Type model. Then the use of the relationships and models to analyze and significantly reduce 0 → 1 transition activity with little computational effort is illustrated by several, high-level synthesis examples.

AB - Significant power reduction can be obtained in the datapath of a CMOS VLSI circuit if data characteristics are carefully exploited. An improved approach that achieves such reduction by using a new model relating important data characteristics to the transition activity in static CMOS circuits is presented. Specifically, relationships between fixed-point, two's complement data and 0 → 1 transition activity in static CMOS circuits are identified. Models for computing transition activity in terms of a set of statistical parameters are developed, and their performance compared with the Dual Bit Type model. Then the use of the relationships and models to analyze and significantly reduce 0 → 1 transition activity with little computational effort is illustrated by several, high-level synthesis examples.

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M3 - Conference contribution

AN - SCOPUS:0033893684

SP - 38

EP - 43

BT - Proceedings of the IEEE International Conference on VLSI Design

PB - IEEE

CY - Los Alamitos, CA, United States

T2 - The 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium

Y2 - 3 January 2000 through 7 January 2000

ER -

Relating data characteristics to transition activity in high-level static CMOS design

Abstract

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ASJC Scopus subject areas

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