Principal pilot line manufacturing challenges and solutions in direct fabrication of a-Si:H TFT arrays on flexible substrates

Shawn M. O'Rourke, Douglas E. Loy, Curt Moyer, Scott K. Ageno, Barry P. O'Brien, Edward J. Bawolek, Dirk Bottesch, Michael Marrs, Jeff Dailey, Rita Cordova, Jovan Trujillo, Jann Kaminski, David Allee, Sameer Venugopal, Gregory Raupp

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Principal challenges to direct fabrication of high performance a-Si:H transistor arrays on flexible substrates include automated handling through bonding-debonding processes, substrate-compatible low temperature fabrication processes, management of dimensional instability of plastic substrates, and planarization and management of CTE mismatch for stainless steel foils. In collaboration with our industrial and academic partners, we have developed viable solutions to address these challenges, as described in this paper.

Original languageEnglish (US)
Title of host publicationLarge-Area Processing and Patterning for Active Optical and Electronic Devices
Pages73-81
Number of pages9
StatePublished - Dec 1 2008
Event2007 MRS Fall Meeting - Boston, MA, United States
Duration: Nov 26 2007Nov 30 2007

Publication series

NameMaterials Research Society Symposium Proceedings
Volume1030
ISSN (Print)0272-9172

Other

Other2007 MRS Fall Meeting
CountryUnited States
CityBoston, MA
Period11/26/0711/30/07

ASJC Scopus subject areas

  • Materials Science(all)
  • Condensed Matter Physics
  • Mechanics of Materials
  • Mechanical Engineering

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