TY - GEN
T1 - Prediction-based flow control for network-on-chip traffic
AU - Ogras, Umit Y.
AU - Marculescu, Radu
PY - 2006
Y1 - 2006
N2 - Networks-on-Chip (NoC) architectures provide a scalable solution to on-chip communication problem but the bandwidth offered by NoCs can be utilized efficiently only in presence of effective flow control algorithms. Unfortunately, the flow control algorithms pub-lished to date for macronetworks, either rely on local information, or suffer from large communication overhead and unpredictable delays. Hence, using them in the NoC context is problematic at best. For this reason, we propose a predictive closed-loop flow con-trol mechanism and make the following contributions: First, we develop traffic source and router models specifically targeted to NoCs. Then, we utilize these models to predict the cases of possible congestion in the network. Based on this information, the proposed scheme controls the packet injection rate at traffic sources in order to regulate the total number of packets in the network. Evaluations involving real and synthetic traffic patterns show that the proposed controller delivers a superior performance compared to the traditional switch-to-switch flow control algorithms.
AB - Networks-on-Chip (NoC) architectures provide a scalable solution to on-chip communication problem but the bandwidth offered by NoCs can be utilized efficiently only in presence of effective flow control algorithms. Unfortunately, the flow control algorithms pub-lished to date for macronetworks, either rely on local information, or suffer from large communication overhead and unpredictable delays. Hence, using them in the NoC context is problematic at best. For this reason, we propose a predictive closed-loop flow con-trol mechanism and make the following contributions: First, we develop traffic source and router models specifically targeted to NoCs. Then, we utilize these models to predict the cases of possible congestion in the network. Based on this information, the proposed scheme controls the packet injection rate at traffic sources in order to regulate the total number of packets in the network. Evaluations involving real and synthetic traffic patterns show that the proposed controller delivers a superior performance compared to the traditional switch-to-switch flow control algorithms.
KW - Congestion control
KW - Flow control
KW - Multi-processor systems
KW - Networks-on-chip
UR - http://www.scopus.com/inward/record.url?scp=34547210346&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=34547210346&partnerID=8YFLogxK
U2 - 10.1145/1146909.1147123
DO - 10.1145/1146909.1147123
M3 - Conference contribution
AN - SCOPUS:34547210346
SN - 1595933816
SN - 1595933816
SN - 9781595933812
T3 - Proceedings - Design Automation Conference
SP - 839
EP - 844
BT - 2006 43rd ACM/IEEE Design Automation Conference, DAC'06
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 43rd Annual Design Automation Conference, DAC 2006
Y2 - 24 July 2006 through 28 July 2006
ER -