TY - GEN
T1 - Path selection based acceleration of conditionals in CGRAs
AU - Radhika, Shri Hari Rajendran
AU - Shrivastava, Aviral
AU - Hamzeh, Mahdi
PY - 2015/4/22
Y1 - 2015/4/22
N2 - Coarse Grain Reconfigurable Arrays (CGRAs) are promising accelerators capable of achieving high performance at low power consumption. While CGRAs can efficiently accelerate loop kernels, accelerating loops with control flow (loops with if-then-else structures) is quite challenging. Existing techniques use predication to handle control flow execution - in which they execute operations from both the paths, but commit only the result of operations from the path taken by branch at run time. However, this results in inefficient resource usage and therefore poor mapping and lower acceleration. The state-of-the-art dual issue scheme fetches instructions from both the paths, but executes only the ones from the correct path but this scheme has an overhead in instruction fetch bandwidth. In this paper, we propose a solution in which after resolving the branching condition, we fetch and execute instructions only from the path taken by branch. Experimental results show that our solution achieves 34.6% better performance and 52.1% lower energy consumption on an average compared to state of the art dual issue scheme.
AB - Coarse Grain Reconfigurable Arrays (CGRAs) are promising accelerators capable of achieving high performance at low power consumption. While CGRAs can efficiently accelerate loop kernels, accelerating loops with control flow (loops with if-then-else structures) is quite challenging. Existing techniques use predication to handle control flow execution - in which they execute operations from both the paths, but commit only the result of operations from the path taken by branch at run time. However, this results in inefficient resource usage and therefore poor mapping and lower acceleration. The state-of-the-art dual issue scheme fetches instructions from both the paths, but executes only the ones from the correct path but this scheme has an overhead in instruction fetch bandwidth. In this paper, we propose a solution in which after resolving the branching condition, we fetch and execute instructions only from the path taken by branch. Experimental results show that our solution achieves 34.6% better performance and 52.1% lower energy consumption on an average compared to state of the art dual issue scheme.
UR - http://www.scopus.com/inward/record.url?scp=84945901507&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84945901507&partnerID=8YFLogxK
U2 - 10.7873/date.2015.0788
DO - 10.7873/date.2015.0788
M3 - Conference contribution
AN - SCOPUS:84945901507
T3 - Proceedings -Design, Automation and Test in Europe, DATE
SP - 121
EP - 126
BT - Proceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015
Y2 - 9 March 2015 through 13 March 2015
ER -