Optimization of Delay Time between Gate Signals for Si/SiC Hybrid Switch

Zhengda Zhang, Lei Zhang, Jiangchao Qin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Si and SiC paralleled hybrid switch has been considered to take the advantages of both Si IGBT and SiC MOSFET for high-power applications. The Si/SiC hybrid switch consists of an Si IGBT for better conduction performance and an SiC MOSFET for better switching performance. With the separated gate control signals, the switching moments of the two devices can be controlled independently to ensure Si IGBT under zero-voltage switching (ZVS) conditions to potentially reduce the switching loss of Si IGBT. However, the delay time between two gate signals significantly influences loss reduction of the hybrid switch, which has never been investigated in detail. In this paper, the impact of the delay time on switching characteristics and efficiency improvement of the hybrid switch is investigated. Based on the simulation and experimental results, the optimal delay time is identified to achieve minimum switching loss. By applying the optimal delay time for controlling the gate signals of the hybrid switch, the total switching energy of the hybrid switch is reduced by 35% comparing to the selected IGBT switch.

Original languageEnglish (US)
Title of host publication2018 IEEE Energy Conversion Congress and Exposition, ECCE 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1882-1886
Number of pages5
ISBN (Electronic)9781479973118
DOIs
StatePublished - Dec 3 2018
Event10th Annual IEEE Energy Conversion Congress and Exposition, ECCE 2018 - Portland, United States
Duration: Sep 23 2018Sep 27 2018

Other

Other10th Annual IEEE Energy Conversion Congress and Exposition, ECCE 2018
CountryUnited States
CityPortland
Period9/23/189/27/18

Fingerprint

Delay Time
Time delay
Switch
Insulated gate bipolar transistors (IGBT)
Switches
Optimization
MOSFET
Zero voltage switching
Signal Control
Delay time
Conduction
High Power
Voltage
Moment
Zero
Experimental Results
Energy
Simulation

ASJC Scopus subject areas

  • Energy Engineering and Power Technology
  • Renewable Energy, Sustainability and the Environment
  • Control and Optimization
  • Computer Networks and Communications
  • Hardware and Architecture
  • Information Systems and Management

Cite this

Zhang, Z., Zhang, L., & Qin, J. (2018). Optimization of Delay Time between Gate Signals for Si/SiC Hybrid Switch. In 2018 IEEE Energy Conversion Congress and Exposition, ECCE 2018 (pp. 1882-1886). [8557569] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ECCE.2018.8557569

Optimization of Delay Time between Gate Signals for Si/SiC Hybrid Switch. / Zhang, Zhengda; Zhang, Lei; Qin, Jiangchao.

2018 IEEE Energy Conversion Congress and Exposition, ECCE 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 1882-1886 8557569.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zhang, Z, Zhang, L & Qin, J 2018, Optimization of Delay Time between Gate Signals for Si/SiC Hybrid Switch. in 2018 IEEE Energy Conversion Congress and Exposition, ECCE 2018., 8557569, Institute of Electrical and Electronics Engineers Inc., pp. 1882-1886, 10th Annual IEEE Energy Conversion Congress and Exposition, ECCE 2018, Portland, United States, 9/23/18. https://doi.org/10.1109/ECCE.2018.8557569
Zhang Z, Zhang L, Qin J. Optimization of Delay Time between Gate Signals for Si/SiC Hybrid Switch. In 2018 IEEE Energy Conversion Congress and Exposition, ECCE 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 1882-1886. 8557569 https://doi.org/10.1109/ECCE.2018.8557569
Zhang, Zhengda ; Zhang, Lei ; Qin, Jiangchao. / Optimization of Delay Time between Gate Signals for Si/SiC Hybrid Switch. 2018 IEEE Energy Conversion Congress and Exposition, ECCE 2018. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 1882-1886
@inproceedings{bc04e66d6ae74db5b7df9906993e19f7,
title = "Optimization of Delay Time between Gate Signals for Si/SiC Hybrid Switch",
abstract = "Si and SiC paralleled hybrid switch has been considered to take the advantages of both Si IGBT and SiC MOSFET for high-power applications. The Si/SiC hybrid switch consists of an Si IGBT for better conduction performance and an SiC MOSFET for better switching performance. With the separated gate control signals, the switching moments of the two devices can be controlled independently to ensure Si IGBT under zero-voltage switching (ZVS) conditions to potentially reduce the switching loss of Si IGBT. However, the delay time between two gate signals significantly influences loss reduction of the hybrid switch, which has never been investigated in detail. In this paper, the impact of the delay time on switching characteristics and efficiency improvement of the hybrid switch is investigated. Based on the simulation and experimental results, the optimal delay time is identified to achieve minimum switching loss. By applying the optimal delay time for controlling the gate signals of the hybrid switch, the total switching energy of the hybrid switch is reduced by 35{\%} comparing to the selected IGBT switch.",
author = "Zhengda Zhang and Lei Zhang and Jiangchao Qin",
year = "2018",
month = "12",
day = "3",
doi = "10.1109/ECCE.2018.8557569",
language = "English (US)",
pages = "1882--1886",
booktitle = "2018 IEEE Energy Conversion Congress and Exposition, ECCE 2018",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - Optimization of Delay Time between Gate Signals for Si/SiC Hybrid Switch

AU - Zhang, Zhengda

AU - Zhang, Lei

AU - Qin, Jiangchao

PY - 2018/12/3

Y1 - 2018/12/3

N2 - Si and SiC paralleled hybrid switch has been considered to take the advantages of both Si IGBT and SiC MOSFET for high-power applications. The Si/SiC hybrid switch consists of an Si IGBT for better conduction performance and an SiC MOSFET for better switching performance. With the separated gate control signals, the switching moments of the two devices can be controlled independently to ensure Si IGBT under zero-voltage switching (ZVS) conditions to potentially reduce the switching loss of Si IGBT. However, the delay time between two gate signals significantly influences loss reduction of the hybrid switch, which has never been investigated in detail. In this paper, the impact of the delay time on switching characteristics and efficiency improvement of the hybrid switch is investigated. Based on the simulation and experimental results, the optimal delay time is identified to achieve minimum switching loss. By applying the optimal delay time for controlling the gate signals of the hybrid switch, the total switching energy of the hybrid switch is reduced by 35% comparing to the selected IGBT switch.

AB - Si and SiC paralleled hybrid switch has been considered to take the advantages of both Si IGBT and SiC MOSFET for high-power applications. The Si/SiC hybrid switch consists of an Si IGBT for better conduction performance and an SiC MOSFET for better switching performance. With the separated gate control signals, the switching moments of the two devices can be controlled independently to ensure Si IGBT under zero-voltage switching (ZVS) conditions to potentially reduce the switching loss of Si IGBT. However, the delay time between two gate signals significantly influences loss reduction of the hybrid switch, which has never been investigated in detail. In this paper, the impact of the delay time on switching characteristics and efficiency improvement of the hybrid switch is investigated. Based on the simulation and experimental results, the optimal delay time is identified to achieve minimum switching loss. By applying the optimal delay time for controlling the gate signals of the hybrid switch, the total switching energy of the hybrid switch is reduced by 35% comparing to the selected IGBT switch.

UR - http://www.scopus.com/inward/record.url?scp=85060284866&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85060284866&partnerID=8YFLogxK

U2 - 10.1109/ECCE.2018.8557569

DO - 10.1109/ECCE.2018.8557569

M3 - Conference contribution

SP - 1882

EP - 1886

BT - 2018 IEEE Energy Conversion Congress and Exposition, ECCE 2018

PB - Institute of Electrical and Electronics Engineers Inc.

ER -