Memory-aware application mapping on coarse-grained reconfigurable arrays

Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Jonghee Yoon, Yunheung Paek

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Scopus citations

Abstract

Coarse-Grained Reconfigurable Arrays (CGRAs) are a very promising platform, providing both, up to 10-100 MOps/mW of power efficiency and are software programmable. However, this cardinal promise of CGRAs critically hinges on the effectiveness of application mapping onto CGRA platforms. While previous solutions have greatly improved the computation speed, they have largely ignored the impact of the local memory architecture on the achievable power and performance. This paper motivates the need for memory-aware application mapping for CGRAs, and proposes an effective solution for application mapping that considers the effects of various memory architecture parameters including the number of banks, local memory size, and the communication bandwidth between the local memory and the external main memory. Our proposed solution achieves 62% reduction in the energy-delay product, which factors into about 47% and 28% reduction in the energy consumption and runtime, respectively, as compared to memory-unaware mapping for realistic local memory architectures. We also show that our scheme scales across a range of applications, and memory parameters.

Original languageEnglish (US)
Title of host publicationHigh Performance Embedded Architectures and Compilers - 5th International Conference, HiPEAC 2010, Proceedings
Pages171-185
Number of pages15
DOIs
StatePublished - Mar 25 2010
Event5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010 - Pisa, Italy
Duration: Jan 25 2010Jan 27 2010

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume5952 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010
CountryItaly
CityPisa
Period1/25/101/27/10

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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    Kim, Y., Lee, J., Shrivastava, A., Yoon, J., & Paek, Y. (2010). Memory-aware application mapping on coarse-grained reconfigurable arrays. In High Performance Embedded Architectures and Compilers - 5th International Conference, HiPEAC 2010, Proceedings (pp. 171-185). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 5952 LNCS). https://doi.org/10.1007/978-3-642-11515-8_14