This chapter introduces the submicron metal-oxide semiconductor field-effect transistor (MOSFET) and examines the operation of submicron MOSFETs and junction field-effect transistor-metal semiconductor field-effect transistor (JFET-MESFETs). It presents the requirements for switching high-speed logic. It reviews the band structure variation for silicon and the relevant III-V compounds. The theory of random alloys and the band parameter variations, both for ternary and for quaternary alloys, is discussed. The comparison between silicon and various III-V technologies is drawn for devices in the extreme submicron region— that is, devices of 0.1-0.2 μm gate length. The chapter introduces the problem of line-to-line parasitic capacitance. For device sizes in the 0.12- μm or less region, the line-to-line parasitic capacitance begins to dominate the direct-line capacitance in setting the node capacitance. The chapter concludes that the devices fabricated from materials, such as gallium arsenide (GaAs) and indium phosphide (InP) offer definitive speed advantages over silicon circuitry. The ternaries and quaternaries offer no advantage over InP in comparable devices, and are severely restricted in packing density by their exceedingly poor value of thermal conductivity.
ASJC Scopus subject areas
- Nuclear and High Energy Physics
- Condensed Matter Physics
- Electrical and Electronic Engineering