Low power data format converter design using semi-static register allocation

Kala Srivatsan, Chaitali Chakrabarti, Lori Lucke

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

In many applications, such as digital signal processing, data format converters are used to reformat the data transferred between processing modules. In VLSI implementations, these converters consume a large portion of the available resources. Various methods have been proposed to synthesize data format converter architectures while optimizing the number of registers used to store the data. In this paper, we present a new register allocation scheme which not only minimizes the number of registers, but also minimizes the power consumption in the data format converter. Low power data format converters are synthesized by minimizing the transitions and interconnections between the registers used to store the data. We present both a heuristic and an integer linear programming formulation to solve the allocation problem. Our method shows significant improvement over previous techniques.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Editors Anon
Place of PublicationPiscataway, NJ, United States
PublisherIEEE
Pages460-465
Number of pages6
StatePublished - 1995
EventProceedings of the 1995 IEEE International Conference on Computer Design: VLSI in Computers & Processors - Austin, TX, USA
Duration: Oct 2 1995Oct 4 1995

Other

OtherProceedings of the 1995 IEEE International Conference on Computer Design: VLSI in Computers & Processors
CityAustin, TX, USA
Period10/2/9510/4/95

Fingerprint

Digital signal processing
Linear programming
Electric power utilization
Processing

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Srivatsan, K., Chakrabarti, C., & Lucke, L. (1995). Low power data format converter design using semi-static register allocation. In Anon (Ed.), Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors (pp. 460-465). Piscataway, NJ, United States: IEEE.

Low power data format converter design using semi-static register allocation. / Srivatsan, Kala; Chakrabarti, Chaitali; Lucke, Lori.

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. ed. / Anon. Piscataway, NJ, United States : IEEE, 1995. p. 460-465.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Srivatsan, K, Chakrabarti, C & Lucke, L 1995, Low power data format converter design using semi-static register allocation. in Anon (ed.), Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. IEEE, Piscataway, NJ, United States, pp. 460-465, Proceedings of the 1995 IEEE International Conference on Computer Design: VLSI in Computers & Processors, Austin, TX, USA, 10/2/95.
Srivatsan K, Chakrabarti C, Lucke L. Low power data format converter design using semi-static register allocation. In Anon, editor, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. Piscataway, NJ, United States: IEEE. 1995. p. 460-465
Srivatsan, Kala ; Chakrabarti, Chaitali ; Lucke, Lori. / Low power data format converter design using semi-static register allocation. Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. editor / Anon. Piscataway, NJ, United States : IEEE, 1995. pp. 460-465
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