Load adaptive, high efficiency, switched capacitor intermediate bus converter

Bradley Oraw, Raja Ayyanar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

15 Scopus citations

Abstract

A new non-isolated Intermediate Bus Converter is proposed using a divide-by-4 switched capacitor network. A load adaptive scheme is designed that maximizes the efficiency for all load currents. Detailed analysis using steady-state charge transfer is provided with a static charge constraint concept for degenerate switched capacitor networks. Simple average models for output impedance, capacitor and switch RMS currents, and efficiency are defined. A bus stability criterion is established, and a novel current splitting technique is introduced that reduces the capacitors' RMS currents. A 300W 48V to 12V prototype is designed using a provided efficiency-specified design procedure that achieves 96%-97% over the full range of load current, IA-25A.

Original languageEnglish (US)
Title of host publicationInternational Telecommunication Energy Conference, INTELEC 2007
Pages628-635
Number of pages8
DOIs
StatePublished - Dec 1 2007
EventInternational Telecommunication Energy Conference, INTELEC 2007 - Rome, Italy
Duration: Sep 30 2007Oct 4 2007

Publication series

NameINTELEC, International Telecommunications Energy Conference (Proceedings)
ISSN (Print)0275-0473

Other

OtherInternational Telecommunication Energy Conference, INTELEC 2007
CountryItaly
CityRome
Period9/30/0710/4/07

ASJC Scopus subject areas

  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering

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  • Cite this

    Oraw, B., & Ayyanar, R. (2007). Load adaptive, high efficiency, switched capacitor intermediate bus converter. In International Telecommunication Energy Conference, INTELEC 2007 (pp. 628-635). [4448856] (INTELEC, International Telecommunications Energy Conference (Proceedings)). https://doi.org/10.1109/INTLEC.2007.4448856