TY - GEN
T1 - LMI pole placement based robust Supplementary Damping Controller (SDC) for a Thyristor Controlled Series Capacitor (TCSC) device
AU - Liu, Qian
AU - Vittal, Vijay
AU - Elia, Nicola
PY - 2005
Y1 - 2005
N2 - This paper addresses a systematic controller design for the TCSC device in power systems based on a Linear Matrix Inequality (LMI) pole placement technique. Requirements of performance can be expressed in terms of LMI's. In our formulation we combine a H ∞ controller design with some regional pole placement constraints using LMI's. The application of this controller, which is presented as an example in this paper, is effective in improving the damping ratio of a two-area four-machine test system. Furthermore, good damping ratio can be achieved and maintained over a larger range of operation with this LMI pole placement controller than with a conventionally designed H ∞ controller. Another benefit of this approach is that it results in a fixed parameter controller.
AB - This paper addresses a systematic controller design for the TCSC device in power systems based on a Linear Matrix Inequality (LMI) pole placement technique. Requirements of performance can be expressed in terms of LMI's. In our formulation we combine a H ∞ controller design with some regional pole placement constraints using LMI's. The application of this controller, which is presented as an example in this paper, is effective in improving the damping ratio of a two-area four-machine test system. Furthermore, good damping ratio can be achieved and maintained over a larger range of operation with this LMI pole placement controller than with a conventionally designed H ∞ controller. Another benefit of this approach is that it results in a fixed parameter controller.
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M3 - Conference contribution
AN - SCOPUS:27144521193
SN - 078039156X
SN - 9780780391567
T3 - 2005 IEEE Power Engineering Society General Meeting
SP - 1381
EP - 1386
BT - 2005 IEEE Power Engineering Society General Meeting
T2 - 2005 IEEE Power Engineering Society General Meeting
Y2 - 12 June 2005 through 16 June 2005
ER -