Junctionless nanowire MOSFET with dynamic threshold voltage operation methodology

Jinhe Mei, Aixi Zhang, Cao Yu, Yun Ye, Hao Wang, Wanling Deng, Jin He

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, a junctionless nanowire MOSFET with the dynamic threshold voltage operation methodology (DT-JNT) is proposed and its characteristics are studied comparing with those of a conventional junctionless nanowire transistor (JNT) and a double-gate junctionless transistor (DG-JT) by TCAD simulations. The numerical results demonstrate that the DT-JNT shows a series of desirable features, e.g., integrating the advantages of the junctionless transistor, such as easy-to-manufacture, cost effective, etc and possessing dynamic threshold voltage, thus it enhances applicability to various circuit applications. In addition, when it is used by connect the control gate and the adjust gate together, its ON/OFF current ratio is enhanced. Overall, it holds the potential to be further used in the next generation nanoscale circuit design.

Original languageEnglish (US)
Title of host publicationTechnical Proceedings of the 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013
Pages516-519
Number of pages4
StatePublished - 2013
Externally publishedYes
EventNanotechnology 2013: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013 - Washington, DC, United States
Duration: May 12 2013May 16 2013

Publication series

NameTechnical Proceedings of the 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013
Volume2

Other

OtherNanotechnology 2013: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013
Country/TerritoryUnited States
CityWashington, DC
Period5/12/135/16/13

Keywords

  • Adjust gate
  • Dynamic threshold voltage
  • Junctionless
  • Nanowire

ASJC Scopus subject areas

  • Biotechnology

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