Junctionless nanowire MOSFET with dynamic threshold voltage operation methodology

Jinhe Mei, Aixi Zhang, Yu Cao, Yun Ye, Hao Wang, Wanling Deng, Jin He

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, a junctionless nanowire MOSFET with the dynamic threshold voltage operation methodology (DT-JNT) is proposed and its characteristics are studied comparing with those of a conventional junctionless nanowire transistor (JNT) and a double-gate junctionless transistor (DG-JT) by TCAD simulations. The numerical results demonstrate that the DT-JNT shows a series of desirable features, e.g., integrating the advantages of the junctionless transistor, such as easy-to-manufacture, cost effective, etc and possessing dynamic threshold voltage, thus it enhances applicability to various circuit applications. In addition, when it is used by connect the control gate and the adjust gate together, its ON/OFF current ratio is enhanced. Overall, it holds the potential to be further used in the next generation nanoscale circuit design.

Original languageEnglish (US)
Title of host publicationTechnical Proceedings of the 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013
Pages516-519
Number of pages4
Volume2
StatePublished - 2013
Externally publishedYes
EventNanotechnology 2013: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013 - Washington, DC, United States
Duration: May 12 2013May 16 2013

Other

OtherNanotechnology 2013: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013
CountryUnited States
CityWashington, DC
Period5/12/135/16/13

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Nanowires
Costs and Cost Analysis

Keywords

  • Adjust gate
  • Dynamic threshold voltage
  • Junctionless
  • Nanowire

ASJC Scopus subject areas

  • Biotechnology

Cite this

Mei, J., Zhang, A., Cao, Y., Ye, Y., Wang, H., Deng, W., & He, J. (2013). Junctionless nanowire MOSFET with dynamic threshold voltage operation methodology. In Technical Proceedings of the 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013 (Vol. 2, pp. 516-519)

Junctionless nanowire MOSFET with dynamic threshold voltage operation methodology. / Mei, Jinhe; Zhang, Aixi; Cao, Yu; Ye, Yun; Wang, Hao; Deng, Wanling; He, Jin.

Technical Proceedings of the 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013. Vol. 2 2013. p. 516-519.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Mei, J, Zhang, A, Cao, Y, Ye, Y, Wang, H, Deng, W & He, J 2013, Junctionless nanowire MOSFET with dynamic threshold voltage operation methodology. in Technical Proceedings of the 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013. vol. 2, pp. 516-519, Nanotechnology 2013: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013, Washington, DC, United States, 5/12/13.
Mei J, Zhang A, Cao Y, Ye Y, Wang H, Deng W et al. Junctionless nanowire MOSFET with dynamic threshold voltage operation methodology. In Technical Proceedings of the 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013. Vol. 2. 2013. p. 516-519
Mei, Jinhe ; Zhang, Aixi ; Cao, Yu ; Ye, Yun ; Wang, Hao ; Deng, Wanling ; He, Jin. / Junctionless nanowire MOSFET with dynamic threshold voltage operation methodology. Technical Proceedings of the 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013. Vol. 2 2013. pp. 516-519
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