The inverting subset of fan-out-free boolean functions describe the majority of implementable single-output combinatorial static CMOS gates. Given that each function has many expressions, a method for uniquely identifying these functions is presented and used to determine complements. A large and rich standard cell library incorporates many of these functions, but a reduction in cell-height limits their inclusion due to constraints on internal cell routing. This paper presents a method for listing all such functions and rapid analysis of their viability in different cell heights. Finally, the design constraints in advanced technology nodes limit the utility of a large number of these functions. Those limitations and their impact on the resulting reduction in feasible cells are also described.
|Original language||English (US)|
|Journal||IEEE Transactions on Circuits and Systems II: Express Briefs|
|State||Accepted/In press - Jan 1 2018|
- Logic gates
ASJC Scopus subject areas
- Electrical and Electronic Engineering