High performance and energy-efficient in-memory computing architecture based on SOT-MRAM

Zhezhi He, Shaahin Angizi, Farhana Parveen, Deliang Fan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Scopus citations

Abstract

In this paper, we propose a novel Spin Orbit Torque Magnetic Random Access Memory (SOT-MRAM) array design that could either work as non-volatile memory or implement a reconfigurable in-memory logic (AND/OR/XOR) without addon logic circuits to memory chip as in conventional logic-in-memory designs. The computed logic output could be simply read out like a typical MRAM bit-cell through the modified memory peripheral circuits. Such intrinsic in-memory logic could be used to process data locally to greatly reduce power-hungry and long distance data communication in conventional Von Neumann computing systems. In this work, we further employ in-memory data encryption using Advanced Encryption Standard (AES) algorithm as a case study to demonstrate the efficiency of the proposed design. The device to architecture co-simulation results show that the proposed in-memory data encryption design can achieve 71.2% and 17.3% lower energy consumption compared to CMOS-ASIC and recent Domain Wall (DW)-AES implementations, respectively. Furthermore, it shows ∼ 33% reduction in area compared to DW-AES.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages97-102
Number of pages6
ISBN (Electronic)9781509060368
DOIs
StatePublished - Sep 28 2017
Externally publishedYes
Event2017 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017 - Newport, United States
Duration: Jul 25 2017Jul 26 2017

Publication series

NameProceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017

Conference

Conference2017 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017
CountryUnited States
CityNewport
Period7/25/177/26/17

Keywords

  • AES
  • in-memory computing
  • SOT-MRAM

ASJC Scopus subject areas

  • Hardware and Architecture
  • Computer Networks and Communications

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