Guest editorial: Special issue on accelerated computing

Aviral Shrivastava; Fadi J. Kurdahi

doi:10.1109/TMSCS.2018.2807058

Guest editorial: Special issue on accelerated computing

Research output: Contribution to journal › Editorial › peer-review

Original language	English (US)
Pages (from-to)	1-2
Number of pages	2
Journal	IEEE Transactions on Multi-Scale Computing Systems
Volume	4
Issue number	1
DOIs	https://doi.org/10.1109/TMSCS.2018.2807058
State	Published - Jan 1 2018

ASJC Scopus subject areas

Control and Systems Engineering
Information Systems
Hardware and Architecture

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10.1109/TMSCS.2018.2807058

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title = "Guest editorial: Special issue on accelerated computing",

author = "Aviral Shrivastava and Kurdahi, {Fadi J.}",

note = "Funding Information: Aviral Shrivastava received the bachelor{\textquoteright}s degree in computer science and engineering from the Indian Institute of Technol-ogy, Delhi, and the PhD and master{\textquoteright}s degrees in information and computer science from the University of California, Irvine. He is a 2011 NSF CAREER Award Recipient, and recipient of the 2012 Outstanding Junior Researcher in CSE at Arizona State University (ASU). His works have received the Best Student Paper Award at VLSI 2016, and a Best Paper Award nomi-nation at DAC 2017 and ASPDAC 2008. His students have received outstanding the PhD Student Award in CSE at ASU in 2017, and Outstanding MS Student Award in CSE at ASU in 2012 and 2010, respectively. He is an associate professor in the School of Computing Informatics and Decision Systems Engineering at the Arizona State University, where he has estab-lished and heads the Compiler and Microarchitecture Labs (CML) (http://aviral.lab.asu.edu/). Prof. Shrivastava{\textquoteright}s research lies in the broad area of “Software for Embedded and Cyber-Physical Systems.” More specifically, he is interested in topics around i) Compilers and microarchitectures for heterogeneous and many-core computing, ii) protecting computation from soft errors, and iii) Precise timing for Cyber-Physical Systems. His research is funded by NSF, DOE, NIST, and several industries including Microsoft, Raytheon Missile Systems, Intel, Nvidia, etc. He serves on the organizing and program committees of several premier embedded system conferences, including DAC, ICCAD, ISLPED, CODES+ISSS, CASES and LCTES. He is currently serving as an associate editor for the ACM Transactions Embedded Computing Systems (ACM TECS), IEEE Transactions on Computer-Aided Design (IEEE TCAD), IEEE Transactions on MultiScale Computing (IEEE TMSC), Springer International Journal on Parallel Processing (Springer IJPP), and the Springer Journal on Design Automation for Embedded Systems. He is the program chair of CODES+ISSS 2017 and 2018, one of the top conferences in embedded systems.",

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language = "English (US)",

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AU - Kurdahi, Fadi J.

N1 - Funding Information: Aviral Shrivastava received the bachelor’s degree in computer science and engineering from the Indian Institute of Technol-ogy, Delhi, and the PhD and master’s degrees in information and computer science from the University of California, Irvine. He is a 2011 NSF CAREER Award Recipient, and recipient of the 2012 Outstanding Junior Researcher in CSE at Arizona State University (ASU). His works have received the Best Student Paper Award at VLSI 2016, and a Best Paper Award nomi-nation at DAC 2017 and ASPDAC 2008. His students have received outstanding the PhD Student Award in CSE at ASU in 2017, and Outstanding MS Student Award in CSE at ASU in 2012 and 2010, respectively. He is an associate professor in the School of Computing Informatics and Decision Systems Engineering at the Arizona State University, where he has estab-lished and heads the Compiler and Microarchitecture Labs (CML) (http://aviral.lab.asu.edu/). Prof. Shrivastava’s research lies in the broad area of “Software for Embedded and Cyber-Physical Systems.” More specifically, he is interested in topics around i) Compilers and microarchitectures for heterogeneous and many-core computing, ii) protecting computation from soft errors, and iii) Precise timing for Cyber-Physical Systems. His research is funded by NSF, DOE, NIST, and several industries including Microsoft, Raytheon Missile Systems, Intel, Nvidia, etc. He serves on the organizing and program committees of several premier embedded system conferences, including DAC, ICCAD, ISLPED, CODES+ISSS, CASES and LCTES. He is currently serving as an associate editor for the ACM Transactions Embedded Computing Systems (ACM TECS), IEEE Transactions on Computer-Aided Design (IEEE TCAD), IEEE Transactions on MultiScale Computing (IEEE TMSC), Springer International Journal on Parallel Processing (Springer IJPP), and the Springer Journal on Design Automation for Embedded Systems. He is the program chair of CODES+ISSS 2017 and 2018, one of the top conferences in embedded systems.

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Guest editorial: Special issue on accelerated computing

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