GENERATION OF SHORTEST TEST SEQUENCES FOR DETECTING INDIVIDUAL FAULTS OF SEQUENTIAL CIRCUITS.

A technique for generating the shortest test sequences to detect individual faults of synchronous sequential circuits is presented. Instead of working on the flow table of a sequential machine, this technique deals with the logic equations of the given circuit of a sequential machine. It is based on the manipulation of the output functions expressed in terms of the primary input variables and the fault under consideration. The types of faults considered are single stuck-at-0 and stuck-at-1 faults. It is quite efficient and applicable to synchronous sequential circuits with or without reset circuitry. The effect of undetectable faults on this technique is also discussed.