FreePDK v2.0: Transitioning VLSI education towards nanometer variation-aware Designs

James E. Stine, Jun Chen, Ivan Castellanos, Gopal Sundararajan, Mohammad Qayam, Praveen Kumar, Justin Remington, Sohum Sohoni

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Scopus citations

Abstract

This paper discusses an extension to an open source, variation aware Process Design Kit (PDK), based on Scalable CMOS design rules. This PDK is designed for 45nm feature sizes and is utilized for use in VLSI research, computer architecture, education and small businesses. This kit includes all the necessary layout design rules and extraction command decks to capture layout dependent systematic variation and perform statistical circuit analysis. The kit also includes a standard cell library, MIPS® processor and associated GNU-compliant compiler and the necessary support files to enable full chip place and route and verification for System on Chip designs. An analog and digital system test chip is also included with this PDK-extension allowing exploration of nanometer-based VLSI designs.

Original languageEnglish (US)
Title of host publication2009 IEEE International Conference on Microelectronic Systems Education, MSE 2009
Pages100-103
Number of pages4
DOIs
StatePublished - 2009
Externally publishedYes
Event2009 IEEE International Conference on Microelectronic Systems Education, MSE 2009 - San Francisco, CA, United States
Duration: Jul 25 2009Jul 27 2009

Publication series

Name2009 IEEE International Conference on Microelectronic Systems Education, MSE 2009

Other

Other2009 IEEE International Conference on Microelectronic Systems Education, MSE 2009
Country/TerritoryUnited States
CitySan Francisco, CA
Period7/25/097/27/09

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Education

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