Abstract
We present several new efficient architectures to solve the hidden surface problem in the feature domain. All the architectures operate on segments (instead of pixels) and create a list of visible segments for each scan line. We present two new semi-systolic architectures consisting of an array of M processors, where M is the maximum number of overlapping segments. Both architectures require presorting of the segment endpoints and have a latency of O(N), where N is the number of input segments. We present two new sorting network architectures which do not require any presorting of the endpoints. These architectures consist of O(log N) stages of segment merge units and are based on odd-even merge sort and running merge sort.
| Original language | English (US) |
|---|---|
| Article number | 413397 |
| Pages (from-to) | 661-665 |
| Number of pages | 5 |
| Journal | Unknown Journal |
| Volume | 1 |
| DOIs | |
| State | Published - 1994 |
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ASJC Scopus subject areas
- Software
- Computer Vision and Pattern Recognition
- Signal Processing
Cite this
Efficient architectures for hidden surface removal. / Chakrabarti, Chaitali; Lucke, L.
In: Unknown Journal, Vol. 1, 413397, 1994, p. 661-665.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Efficient architectures for hidden surface removal
AU - Chakrabarti, Chaitali
AU - Lucke, L.
PY - 1994
Y1 - 1994
N2 - We present several new efficient architectures to solve the hidden surface problem in the feature domain. All the architectures operate on segments (instead of pixels) and create a list of visible segments for each scan line. We present two new semi-systolic architectures consisting of an array of M processors, where M is the maximum number of overlapping segments. Both architectures require presorting of the segment endpoints and have a latency of O(N), where N is the number of input segments. We present two new sorting network architectures which do not require any presorting of the endpoints. These architectures consist of O(log N) stages of segment merge units and are based on odd-even merge sort and running merge sort.
AB - We present several new efficient architectures to solve the hidden surface problem in the feature domain. All the architectures operate on segments (instead of pixels) and create a list of visible segments for each scan line. We present two new semi-systolic architectures consisting of an array of M processors, where M is the maximum number of overlapping segments. Both architectures require presorting of the segment endpoints and have a latency of O(N), where N is the number of input segments. We present two new sorting network architectures which do not require any presorting of the endpoints. These architectures consist of O(log N) stages of segment merge units and are based on odd-even merge sort and running merge sort.
UR - http://www.scopus.com/inward/record.url?scp=84997079460&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84997079460&partnerID=8YFLogxK
U2 - 10.1109/ICIP.1994.413397
DO - 10.1109/ICIP.1994.413397
M3 - Article
AN - SCOPUS:84997079460
VL - 1
SP - 661
EP - 665
JO - Scanning Electron Microscopy
JF - Scanning Electron Microscopy
SN - 0586-5581
M1 - 413397
ER -