Effects of global interconnect optimizations on performance estimation of deep submicron design

Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Sudhakar Muddu, Dirk Stroobandt, Dennis Sylvestel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

42 Scopus citations


In this paper, we quantify the impact of global interconnect optimization techniques that address such design objectives as delay, peak noise, delay uncertainty due to noise, power, and cost. In doing so, we develop a new system-performance simulation model as a set of studies within the MARCO GSRC Technology Extrapolation (GTX) system. We model a typical point-to-point global interconnect and focus on accurate assessment of both circuit and design technology with respect to such issues as inductance, signal line shielding, dynamic delay, buffer placement uncertainty and repeater staggering. We demonstrate, for example, that optimal wire sizing models need to consider inductive effects - And that use of more accurate (-1,3) worst-case capacitive coupling noise switch factors substantially increases peak noise estimates compared to traditional (0,2) bounds. We also find that optimal repeater sizes are significantly smaller than conventional models would suggest, especially when considering energy-delay issues.

Original languageEnglish (US)
Title of host publicationIEEE/ACM International Conference on Computer Aided Design
Subtitle of host publicationA Conference for the EE CAD Professional, ICCAD 2000
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages6
ISBN (Electronic)0780364457
StatePublished - 2000
Externally publishedYes
EventIEEE/ACM International Conference on Computer Aided Design, ICCAD 2000 - San Jose, United States
Duration: Nov 5 2000Nov 9 2000

Publication series

NameIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
ISSN (Print)1092-3152


ConferenceIEEE/ACM International Conference on Computer Aided Design, ICCAD 2000
Country/TerritoryUnited States
CitySan Jose


  • Crosstalk noise
  • Inductance
  • Interconnect delay
  • System performance models
  • Technology extrapolation
  • VLSI

ASJC Scopus subject areas

  • Software
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design


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