Compact modeling of a PD SOI MESFET for wide temperature designs

Asha Balijepalli, Joseph Ervin, Yu Cao, Trevor Thornton

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

A compact model for the partially-depleted (PD) silicon-on-insulator (SOI) Metal Semiconductor Field Effect Transistor (MESFET) is presented. The absence of a gate-oxide makes the SOI MESFET extremely robust, able to withstand high voltages, and useful for extreme environment electronics. The device has been fabricated using a standard CMOS process. In contrast to SOI MOSFETs and GaAs MESFETs, the source-substrate voltage has a significant impact on the channel current. In this work a model has been developed that includes the effect of the buried-oxide on the performance of the MESFET. The model has been verified for a wide temperature range of -180°C to 150°C. A behavioral model has been included to model the breakdown voltage. The core DC and RF models have been adapted from the commercially available Triquint's Own Model (TOM3) MESFET model. A measurement-based approach is used to develop a 4-terminal device model. The charge-based approach, using S-parameter measurements was used to develop the capacitance model. We also propose a widetemperature compensation technique by source-voltage modulation.

Original languageEnglish (US)
Title of host publicationProceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007
Pages133-138
Number of pages6
DOIs
Publication statusPublished - 2007
Event8th International Symposium on Quality Electronic Design, ISQED 2007 - San Jose, CA, United States
Duration: Mar 26 2007Mar 28 2007

Other

Other8th International Symposium on Quality Electronic Design, ISQED 2007
CountryUnited States
CitySan Jose, CA
Period3/26/073/28/07

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

Cite this

Balijepalli, A., Ervin, J., Cao, Y., & Thornton, T. (2007). Compact modeling of a PD SOI MESFET for wide temperature designs. In Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007 (pp. 133-138). [4149024] https://doi.org/10.1109/ISQED.2007.49