CMOS-compatible SOI MESFETs with high breakdown voltage

Joseph Ervin, A'Sha Balijepalli, Punarvasu Joshi, Vadim Kushner, Jinman Yang, Trevor Thornton

Research output: Contribution to journalArticle

70 Citations (Scopus)

Abstract

The authors demonstrate that silicon-on-insulator (SOI) MESFETs can be fabricated alongside SOI CMOS with no changes to the foundry process flow. The MESFETs operate in depletion mode with a threshold voltage of -0.6 V for a gate length of 0.6 μm. The breakdown voltage of the MESFETs greatly exceeds that of the CMOS devices and varies in the range of 12-58 V depending upon the channel access length, i.e., the distance from the edge of the gate to the edge of the drain region. For MESFETs with a gate length of 0.6 μm and an access length of 0.6 μm, the peak cutoff frequency exceeds 7 GHz. The maximum available gain increases with drain bias and values of fmax range from 17 GHz at YDD = 2 V to 22 GHz at VDD = 8 V.

Original languageEnglish (US)
Pages (from-to)3129-3134
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume53
Issue number12
DOIs
StatePublished - Dec 2006

Fingerprint

Silicon
Electric breakdown
electrical faults
CMOS
field effect transistors
insulators
Cutoff frequency
silicon
Foundries
Threshold voltage
foundries
threshold voltage
depletion
cut-off

Keywords

  • Breakdown voltage
  • MESFETs
  • RF power gain
  • Silicon-on-insulator (SOI)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Physics and Astronomy (miscellaneous)

Cite this

CMOS-compatible SOI MESFETs with high breakdown voltage. / Ervin, Joseph; Balijepalli, A'Sha; Joshi, Punarvasu; Kushner, Vadim; Yang, Jinman; Thornton, Trevor.

In: IEEE Transactions on Electron Devices, Vol. 53, No. 12, 12.2006, p. 3129-3134.

Research output: Contribution to journalArticle

Ervin, J, Balijepalli, AS, Joshi, P, Kushner, V, Yang, J & Thornton, T 2006, 'CMOS-compatible SOI MESFETs with high breakdown voltage', IEEE Transactions on Electron Devices, vol. 53, no. 12, pp. 3129-3134. https://doi.org/10.1109/TED.2006.885530
Ervin, Joseph ; Balijepalli, A'Sha ; Joshi, Punarvasu ; Kushner, Vadim ; Yang, Jinman ; Thornton, Trevor. / CMOS-compatible SOI MESFETs with high breakdown voltage. In: IEEE Transactions on Electron Devices. 2006 ; Vol. 53, No. 12. pp. 3129-3134.
@article{8325b258d20b4939a4487e5c071e096c,
title = "CMOS-compatible SOI MESFETs with high breakdown voltage",
abstract = "The authors demonstrate that silicon-on-insulator (SOI) MESFETs can be fabricated alongside SOI CMOS with no changes to the foundry process flow. The MESFETs operate in depletion mode with a threshold voltage of -0.6 V for a gate length of 0.6 μm. The breakdown voltage of the MESFETs greatly exceeds that of the CMOS devices and varies in the range of 12-58 V depending upon the channel access length, i.e., the distance from the edge of the gate to the edge of the drain region. For MESFETs with a gate length of 0.6 μm and an access length of 0.6 μm, the peak cutoff frequency exceeds 7 GHz. The maximum available gain increases with drain bias and values of fmax range from 17 GHz at YDD = 2 V to 22 GHz at VDD = 8 V.",
keywords = "Breakdown voltage, MESFETs, RF power gain, Silicon-on-insulator (SOI)",
author = "Joseph Ervin and A'Sha Balijepalli and Punarvasu Joshi and Vadim Kushner and Jinman Yang and Trevor Thornton",
year = "2006",
month = "12",
doi = "10.1109/TED.2006.885530",
language = "English (US)",
volume = "53",
pages = "3129--3134",
journal = "IEEE Transactions on Electron Devices",
issn = "0018-9383",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "12",

}

TY - JOUR

T1 - CMOS-compatible SOI MESFETs with high breakdown voltage

AU - Ervin, Joseph

AU - Balijepalli, A'Sha

AU - Joshi, Punarvasu

AU - Kushner, Vadim

AU - Yang, Jinman

AU - Thornton, Trevor

PY - 2006/12

Y1 - 2006/12

N2 - The authors demonstrate that silicon-on-insulator (SOI) MESFETs can be fabricated alongside SOI CMOS with no changes to the foundry process flow. The MESFETs operate in depletion mode with a threshold voltage of -0.6 V for a gate length of 0.6 μm. The breakdown voltage of the MESFETs greatly exceeds that of the CMOS devices and varies in the range of 12-58 V depending upon the channel access length, i.e., the distance from the edge of the gate to the edge of the drain region. For MESFETs with a gate length of 0.6 μm and an access length of 0.6 μm, the peak cutoff frequency exceeds 7 GHz. The maximum available gain increases with drain bias and values of fmax range from 17 GHz at YDD = 2 V to 22 GHz at VDD = 8 V.

AB - The authors demonstrate that silicon-on-insulator (SOI) MESFETs can be fabricated alongside SOI CMOS with no changes to the foundry process flow. The MESFETs operate in depletion mode with a threshold voltage of -0.6 V for a gate length of 0.6 μm. The breakdown voltage of the MESFETs greatly exceeds that of the CMOS devices and varies in the range of 12-58 V depending upon the channel access length, i.e., the distance from the edge of the gate to the edge of the drain region. For MESFETs with a gate length of 0.6 μm and an access length of 0.6 μm, the peak cutoff frequency exceeds 7 GHz. The maximum available gain increases with drain bias and values of fmax range from 17 GHz at YDD = 2 V to 22 GHz at VDD = 8 V.

KW - Breakdown voltage

KW - MESFETs

KW - RF power gain

KW - Silicon-on-insulator (SOI)

UR - http://www.scopus.com/inward/record.url?scp=33947200309&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33947200309&partnerID=8YFLogxK

U2 - 10.1109/TED.2006.885530

DO - 10.1109/TED.2006.885530

M3 - Article

VL - 53

SP - 3129

EP - 3134

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

SN - 0018-9383

IS - 12

ER -