CMOS-compatible SOI MESFETs with high breakdown voltage

Joseph Ervin, A'Sha Balijepalli, Punarvasu Joshi, Vadim Kushner, Jinman Yang, Trevor Thornton

Research output: Contribution to journalArticle

73 Scopus citations

Abstract

The authors demonstrate that silicon-on-insulator (SOI) MESFETs can be fabricated alongside SOI CMOS with no changes to the foundry process flow. The MESFETs operate in depletion mode with a threshold voltage of -0.6 V for a gate length of 0.6 μm. The breakdown voltage of the MESFETs greatly exceeds that of the CMOS devices and varies in the range of 12-58 V depending upon the channel access length, i.e., the distance from the edge of the gate to the edge of the drain region. For MESFETs with a gate length of 0.6 μm and an access length of 0.6 μm, the peak cutoff frequency exceeds 7 GHz. The maximum available gain increases with drain bias and values of fmax range from 17 GHz at YDD = 2 V to 22 GHz at VDD = 8 V.

Original languageEnglish (US)
Pages (from-to)3129-3134
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume53
Issue number12
DOIs
StatePublished - Dec 1 2006

Keywords

  • Breakdown voltage
  • MESFETs
  • RF power gain
  • Silicon-on-insulator (SOI)

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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