TY - GEN
T1 - Circuit/device modeling at the quantum level
AU - Yu, Zhiping
AU - Dutton, Robert W.
AU - Kiehl, Richard A.
N1 - Funding Information:
The support for this work through grants from DARPA (contract DABT63-95-C-0090) and NSF (through NCCE project: ECS-9526378) is greatly appreciated.
Publisher Copyright:
© 1996 IEEE.
PY - 1998
Y1 - 1998
N2 - Quantum mechanical (QM) effects, which manifest when the device dimensions are comparable to the de Broglie wavelength, are becoming common physical phenomena in the current micro-/nano-meter technology era. While most novel devices take advantage of QM effects to achieve fast switching speed, miniature size, and extremely small power consumption, the mainstream CMOS devices (with the exception of EEPROMs) are generally suffering in performance from these effects. Solutions to minimize the adverse effects caused by QM while keeping the down scaling trend (technology feasibility aside) are being sought in the research community and industry-wide. This talk tries to present a perspective view of modeling approaches to quantum mechanical effects in solid-state devices at the device and circuit simulation levels. Specifically, the macroscopic modeling of silicon devices to include QM corrections in the classical transport framework is discussed. Both device and circuit models are provided. On the quantum devices, such as the single electron junctions and transistors, the emphasis is placed on the principle of logic circuit operation.
AB - Quantum mechanical (QM) effects, which manifest when the device dimensions are comparable to the de Broglie wavelength, are becoming common physical phenomena in the current micro-/nano-meter technology era. While most novel devices take advantage of QM effects to achieve fast switching speed, miniature size, and extremely small power consumption, the mainstream CMOS devices (with the exception of EEPROMs) are generally suffering in performance from these effects. Solutions to minimize the adverse effects caused by QM while keeping the down scaling trend (technology feasibility aside) are being sought in the research community and industry-wide. This talk tries to present a perspective view of modeling approaches to quantum mechanical effects in solid-state devices at the device and circuit simulation levels. Specifically, the macroscopic modeling of silicon devices to include QM corrections in the classical transport framework is discussed. Both device and circuit models are provided. On the quantum devices, such as the single electron junctions and transistors, the emphasis is placed on the principle of logic circuit operation.
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U2 - 10.1109/IWCE.1998.742752
DO - 10.1109/IWCE.1998.742752
M3 - Conference contribution
AN - SCOPUS:84943237864
T3 - Extended Abstracts of 1998 6th International Workshop on Computational Electronics, IWCE 1998
SP - 222
EP - 229
BT - Extended Abstracts of 1998 6th International Workshop on Computational Electronics, IWCE 1998
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 6th International Workshop on Computational Electronics, IWCE 1998
Y2 - 19 October 1998 through 21 October 1998
ER -