Architecting an LTE base station with graphics processing units

Q. Zheng, Y. Chen, R. Dreslinski, Chaitali Chakrabarti, A. Anastasopoulos, S. Mahlke, T. Mudge

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Scopus citations

Abstract

Due to the rapid growth of mobile communication, wireless base stations are becoming a significant consumer of computational resources. Historically, base stations have been built from ASICs, DSP processors, or FPGAs. This paper studies the feasibility of building wireless base stations from commercial graphics processing units (GPUs). GPUs are attractive because they are widely used massively parallel devices that can be programmed in a high level language. Base station workloads are highly parallel, making GPUs a potential candidate for a cost effective programmable solution. In this work, we develop parallel implementations of key kernels to evaluate the merits of using GPUs as the baseband signal processor. We show that the digital processing subsystem for a 75 Mbps LTE base station can be built using two NVIDIA GTX 680 GPUs with power consumption of 188 W.

Original languageEnglish (US)
Title of host publication2013 IEEE Workshop on Signal Processing Systems, SiPS 2013
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages219-224
Number of pages6
ISBN (Print)9781467362382
DOIs
StatePublished - Jan 1 2013
Event2013 IEEE Workshop on Signal Processing Systems, SiPS 2013 - Taipei, Taiwan, Province of China
Duration: Oct 16 2013Oct 18 2013

Publication series

NameIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
ISSN (Print)1520-6130

Other

Other2013 IEEE Workshop on Signal Processing Systems, SiPS 2013
Country/TerritoryTaiwan, Province of China
CityTaipei
Period10/16/1310/18/13

Keywords

  • Baseband processing
  • Graphics processing unit
  • LTE base station
  • Power efficient

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Signal Processing
  • Applied Mathematics
  • Hardware and Architecture

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