TY - GEN
T1 - Analytical results for design space exploration of multi-core processors employing thread migration
AU - Rao, Ravishankar
AU - Vrudhula, Sarma
AU - Berezowski, Krzysztof
PY - 2008/12/17
Y1 - 2008/12/17
N2 - Migrating threads away from the hot cores in a multicore processor allows them to operate at up to higher speeds. While this technique has already attracted a lot of research effort, the majority of thread migration studies are simulation-based. Although they are valuable for micro-architectural level optimization, they require prohibitively long simulation times, and hence have limited value for early design space exploration. We derive closed form expressions for the steady-state throughput of a multicore processor that employs thread migration and throttling for thermal management. These expressions can be evaluated under a millisecond (vs days for cycle-accurate simulation), and allow designers greater flexibility in evaluating the trade-offs involved in implementing thread migration on-chip. We also developed a system-level power/thermal simulator that we used to validate the analytical results.
AB - Migrating threads away from the hot cores in a multicore processor allows them to operate at up to higher speeds. While this technique has already attracted a lot of research effort, the majority of thread migration studies are simulation-based. Although they are valuable for micro-architectural level optimization, they require prohibitively long simulation times, and hence have limited value for early design space exploration. We derive closed form expressions for the steady-state throughput of a multicore processor that employs thread migration and throttling for thermal management. These expressions can be evaluated under a millisecond (vs days for cycle-accurate simulation), and allow designers greater flexibility in evaluating the trade-offs involved in implementing thread migration on-chip. We also developed a system-level power/thermal simulator that we used to validate the analytical results.
KW - Analytical
KW - Leakage dependence on temperature
KW - Thermal management
KW - Thermal model
KW - Thread migration
KW - Throttling
KW - Throughput
UR - http://www.scopus.com/inward/record.url?scp=57549092060&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=57549092060&partnerID=8YFLogxK
U2 - 10.1145/1393921.1393981
DO - 10.1145/1393921.1393981
M3 - Conference contribution
AN - SCOPUS:57549092060
SN - 9781605581095
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
SP - 229
EP - 232
BT - ISLPED'08
T2 - ISLPED'08: 13th ACM/IEEE International Symposium on Low Power Electronics and Design
Y2 - 11 August 2008 through 13 August 2008
ER -