Abstract
In this paper, we review recent developments in VLSI architectures and algorithms for efficient implementation of lifting based Discrete Wavelet Transform (DWT). The basic principle behind the lifting based scheme is to decompose the finite impulse response (FIR) filters in wavelet transform into a finite sequence of simple filtering steps. Lifting based DWT implementations have many advantages, and have recently been proposed for the JPEG2000 standard for image compression. Consequently, this has become an area of active research and several architectures have been proposed in recent years. In this paper, we provide a survey of these architectures for both 1-dimensional and 2-dimensional DWT. The architectures are representative of many design styles and range from highly parallel architectures to DSP-based architectures to folded architectures. We provide a systematic derivation of these architectures along with an analysis of their hardware and timing complexities.
Original language | English (US) |
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Pages (from-to) | 321-339 |
Number of pages | 19 |
Journal | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology |
Volume | 42 |
Issue number | 3 |
DOIs | |
State | Published - Mar 1 2006 |
Keywords
- Architecture
- Discrete Wavelet Transform
- Lifting
- VLSI
ASJC Scopus subject areas
- Signal Processing
- Information Systems
- Electrical and Electronic Engineering