A dual mode redundant approach for microprocessor soft error hardness

Lawrence T. Clark, Dan W. Patterson, Nathan D. Hindman, Keith Holbert, Satendra Maurya, Steven M. Guertin

Research output: Contribution to journalArticle

13 Scopus citations

Abstract

A dual mode redundant (DMR) logic data path with instruction restart that detects errors at register file (RF) write-back is presented. The DMR RF allows SEU correction using parity to detect RF entry nibbles that are correct in one copy but not the other. Detection and backing out incorrect write data are also described. The radiation hardened by design (RHBD) circuits are implemented in 90 nm CMOS. The DMR microarchitecture is described, including pipelining, error handling, and the associated hardware. Heavy ion and proton testing validate the approach. Experimentally measured cross sections and examples of errors due to pipeline SET or RF SEU are shown. Critical node spacing and the mitigation of multiple node collection are also described.

Original languageEnglish (US)
Article number6084712
Pages (from-to)3018-3025
Number of pages8
JournalIEEE Transactions on Nuclear Science
Volume58
Issue number6 PART 1
DOIs
StatePublished - Dec 1 2011

Keywords

  • Dual mode redundancy
  • error correction
  • radiation hardening
  • register files
  • sequential logic circuits
  • single event effects
  • soft errors
  • total ionizing dose

ASJC Scopus subject areas

  • Nuclear and High Energy Physics
  • Nuclear Energy and Engineering
  • Electrical and Electronic Engineering

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  • Cite this

    Clark, L. T., Patterson, D. W., Hindman, N. D., Holbert, K., Maurya, S., & Guertin, S. M. (2011). A dual mode redundant approach for microprocessor soft error hardness. IEEE Transactions on Nuclear Science, 58(6 PART 1), 3018-3025. [6084712]. https://doi.org/10.1109/TNS.2011.2168828