A 650 kV/<italic>μ</italic>s Common-Mode Resilient CMOS Galvanically Isolated Communication System

Mahdi Javid, Karel Ptacek, Richard Burton, Jennifer Kitchen

Research output: Contribution to journalArticlepeer-review

Abstract

This work presents a galvanically isolated chip-to-chip communication system that utilizes laterally coupled resonators in combination with a new differential full-wave receiver architecture. Lateral resonant coupling increases the isolation capability and significantly minimizes the intra-chip coupling capacitance of galvanic isolators beyond the limits of vertical coupling in standard CMOS. The presented system marries the merits of a laterally resonant coupled channel with a source-gate coupled low-power, low-latency RF detector architecture that enables high common-mode and differential noise immunity. A center-tapped transformer is used as the interface between the proposed fully differential receiver and the communication channel to further enhance the common-mode transient immunity (CMTI). The proposed system is integrated in a CMOS process with four metal layers and does not alter the native process or necessitate additional fabrication steps. The design does not require exotic packaging and achieves state-of-art CMTI of 650 kV/ at 5 kVpk isolation, sub-20ns propagation delay, and maintains a small form-factor of 0.95. The GI system exhibits robust performance to fabrication variations, with less than ±0.3% and ±8% sensitivity to process variation and post-assembly chip distance offset, respectively.

Original languageEnglish (US)
Pages (from-to)587-598
Number of pages12
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume69
Issue number2
DOIs
StatePublished - Feb 1 2022
Externally publishedYes

Keywords

  • Capacitance
  • Couplings
  • Magnetic domains
  • Magnetic resonance
  • Receivers
  • Topology
  • Transient analysis

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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