TY - JOUR
T1 - A 10 b 50 MS/s opamp-sharing pipeline A/D with current-reuse OTAs
AU - Chandrashekar, Kailash
AU - Bakkaloglu, Bertan
N1 - Funding Information:
Manuscript received January 13, 2010; revised May 11, 2010; accepted May 13, 2010. Date of publication July 23, 2010; date of current version July 27, 2011. This work was supported by Arizona State University. The authors are with the Electrical Engineering Department, Arizona State University, Tempe, AZ 85287 USA (e-mail: kailash.chandrashekar@asu.edu; bertan.bakkaloglu@asu.edu). Digital Object Identifier 10.1109/TVLSI.2010.2052376
PY - 2011/9
Y1 - 2011/9
N2 - A 10 b opamp-sharing pipeline analog-to-digital (A/D) using current-reuse operational transconductance amplifiers (OTA) with dual nMOS differential inputs is presented. The current-reuse OTA topology facilitates opamp-sharing between all of the consecutive pipeline stages, minimizing power consumption and die area. Analog transistors in the OTA are always biased in saturation ensuring no loss of settling time due to OTA power turn-on delays. The A/D is fabricated in a 0.18-μ m CMOS process and occupies an active die area of 0.7 mm 2. At 50 MS/s, maximum SNDR of 58 dB (ENOB=9.3 b) is achieved with 9.2 mW analog power consumption on a 1.8 V supply.
AB - A 10 b opamp-sharing pipeline analog-to-digital (A/D) using current-reuse operational transconductance amplifiers (OTA) with dual nMOS differential inputs is presented. The current-reuse OTA topology facilitates opamp-sharing between all of the consecutive pipeline stages, minimizing power consumption and die area. Analog transistors in the OTA are always biased in saturation ensuring no loss of settling time due to OTA power turn-on delays. The A/D is fabricated in a 0.18-μ m CMOS process and occupies an active die area of 0.7 mm 2. At 50 MS/s, maximum SNDR of 58 dB (ENOB=9.3 b) is achieved with 9.2 mW analog power consumption on a 1.8 V supply.
KW - Current-reuse operational transconductance amplifier (OTA)
KW - opamp-sharing
KW - pipeline analog-to-digital (A/D)
UR - http://www.scopus.com/inward/record.url?scp=79961007099&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=79961007099&partnerID=8YFLogxK
U2 - 10.1109/TVLSI.2010.2052376
DO - 10.1109/TVLSI.2010.2052376
M3 - Article
AN - SCOPUS:79961007099
VL - 19
SP - 1610
EP - 1616
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
SN - 1063-8210
IS - 9
M1 - 5518347
ER -