A 10 b 50 MS/s opamp-sharing pipeline A/D with current-reuse OTAs

Kailash Chandrashekar; Bertan Bakkaloglu

doi:10.1109/TVLSI.2010.2052376

A 10 b 50 MS/s opamp-sharing pipeline A/D with current-reuse OTAs

Kailash Chandrashekar, Bertan Bakkaloglu

Research output: Contribution to journal › Article › peer-review

11 Scopus citations

Abstract

A 10 b opamp-sharing pipeline analog-to-digital (A/D) using current-reuse operational transconductance amplifiers (OTA) with dual nMOS differential inputs is presented. The current-reuse OTA topology facilitates opamp-sharing between all of the consecutive pipeline stages, minimizing power consumption and die area. Analog transistors in the OTA are always biased in saturation ensuring no loss of settling time due to OTA power turn-on delays. The A/D is fabricated in a 0.18-μ m CMOS process and occupies an active die area of 0.7 mm ². At 50 MS/s, maximum SNDR of 58 dB (ENOB=9.3 b) is achieved with 9.2 mW analog power consumption on a 1.8 V supply.

Original language	English (US)
Article number	5518347
Pages (from-to)	1610-1616
Number of pages	7
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	19
Issue number	9
DOIs	https://doi.org/10.1109/TVLSI.2010.2052376
State	Published - Sep 1 2011

Keywords

Current-reuse operational transconductance amplifier (OTA)
opamp-sharing
pipeline analog-to-digital (A/D)

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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