25.2 A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source with <6×10 -6 Native Bit Error Rate

Yachuan Pang, Bin Gao, Dong Wu, Shengyu Yi, Qi Liu, Wei Hao Chen, Ting Wei Chang, Wei En Lin, Xiaoyu Sun, Shimeng Yu, He Qian, Meng Fan Chang, Huaqiang Wu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Physically unclonable functions (PUFs) are promising primitives for hardware security with wide applications in the lnternet of Things (IoT), e.g., authentication and encryption key generation [1, 2]. Most silicon PUFs utilize process variability of semiconductor manufacturing [1, 3, 4]. These implementations are sensitive to variations in operating conditions (e.g., supply voltage and temperature variations) and undergo significant native bit-error-rates (N-BERs). Thus, additional stabilizing strategies, such as ECC, majority voting, and masking, are necessary. Furthermore, the PUF key after enrollment cannot be changed in prior implementations [1-5]. This could be unsafe if the PUFs are repeatedly used in insecure environments, as PUFs suffer from the challenges of ownership change and overuse (Fig. 25.2.1).

Original languageEnglish (US)
Title of host publication2019 IEEE International Solid-State Circuits Conference, ISSCC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages402-404
Number of pages3
ISBN (Electronic)9781538685310
DOIs
StatePublished - Mar 6 2019
Event2019 IEEE International Solid-State Circuits Conference, ISSCC 2019 - San Francisco, United States
Duration: Feb 17 2019Feb 21 2019

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume2019-February
ISSN (Print)0193-6530

Conference

Conference2019 IEEE International Solid-State Circuits Conference, ISSCC 2019
CountryUnited States
CitySan Francisco
Period2/17/192/21/19

Fingerprint

Bit error rate
Silicon
Authentication
Cryptography
RRAM
Semiconductor materials
Electric potential
Temperature

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Pang, Y., Gao, B., Wu, D., Yi, S., Liu, Q., Chen, W. H., ... Wu, H. (2019). 25.2 A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source with <6×10 -6 Native Bit Error Rate In 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019 (pp. 402-404). [8662307] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 2019-February). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISSCC.2019.8662307

25.2 A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source with <6×10 -6 Native Bit Error Rate . / Pang, Yachuan; Gao, Bin; Wu, Dong; Yi, Shengyu; Liu, Qi; Chen, Wei Hao; Chang, Ting Wei; Lin, Wei En; Sun, Xiaoyu; Yu, Shimeng; Qian, He; Chang, Meng Fan; Wu, Huaqiang.

2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 402-404 8662307 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 2019-February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Pang, Y, Gao, B, Wu, D, Yi, S, Liu, Q, Chen, WH, Chang, TW, Lin, WE, Sun, X, Yu, S, Qian, H, Chang, MF & Wu, H 2019, 25.2 A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source with <6×10 -6 Native Bit Error Rate in 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019., 8662307, Digest of Technical Papers - IEEE International Solid-State Circuits Conference, vol. 2019-February, Institute of Electrical and Electronics Engineers Inc., pp. 402-404, 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019, San Francisco, United States, 2/17/19. https://doi.org/10.1109/ISSCC.2019.8662307
Pang Y, Gao B, Wu D, Yi S, Liu Q, Chen WH et al. 25.2 A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source with <6×10 -6 Native Bit Error Rate In 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc. 2019. p. 402-404. 8662307. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). https://doi.org/10.1109/ISSCC.2019.8662307
Pang, Yachuan ; Gao, Bin ; Wu, Dong ; Yi, Shengyu ; Liu, Qi ; Chen, Wei Hao ; Chang, Ting Wei ; Lin, Wei En ; Sun, Xiaoyu ; Yu, Shimeng ; Qian, He ; Chang, Meng Fan ; Wu, Huaqiang. / 25.2 A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source with <6×10 -6 Native Bit Error Rate 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 402-404 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).
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AU - Liu, Qi

AU - Chen, Wei Hao

AU - Chang, Ting Wei

AU - Lin, Wei En

AU - Sun, Xiaoyu

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