Sarma Vrudhula

Personal profile

Education/Academic qualification

PHD, University of Southern California

… → 1985

MS, University of Southern California

… → 1981

BMTH, University of Waterloo

… → 1976

Fingerprint Dive into the research topics where Sarma Vrudhula is active. These topic labels come from the works of this person. Together they form a unique fingerprint.

23 Similar Profiles

Threshold logic Engineering & Materials Science

Networks (circuits) Engineering & Materials Science

Logic gates Engineering & Materials Science

Field programmable gate arrays (FPGA) Engineering & Materials Science

Logic circuits Engineering & Materials Science

Hardware Engineering & Materials Science

Throughput Engineering & Materials Science

Data storage equipment Engineering & Materials Science

Network Recent external collaboration on country level. Dive into details by clicking on the dots.

Research Output 1993 2018

4504 Citations
36 h-Index
109 Conference contribution
60 Article
19 Patent
4 Chapter

13 Citations (Scopus)

ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler

Ma, Y., Suda, N., Cao, Y., Vrudhula, S. & Seo, J., Jan 1 2018, (Accepted/In press) In : Integration, the VLSI Journal.

Research output: Contribution to journal › Article

Learning algorithms

Field programmable gate arrays (FPGA)

Neural networks

Throughput

Hardware

Algorithm-hardware co-design of single shot detector for fast object detection on FPGAs

Ma, Y., Zheng, T., Cao, Y., Vrudhula, S. & Seo, J., Nov 5 2018, 2018 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2018 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., a57

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Field programmable gate arrays (FPGA)

Detectors

Hardware

Image classification

Digital circuits

Automatic Compilation of Diverse CNNs onto High-Performance FPGA Accelerators

Ma, Y., Cao, Y., Vrudhula, S. & Seo, J., Jan 1 2018, (Accepted/In press) In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Research output: Contribution to journal › Article

Particle accelerators

Field programmable gate arrays (FPGA)

Neural networks

Hardware

Complex networks

1 Citation (Scopus)

Design Considerations for Energy-Efficient and Variation-Tolerant Nonvolatile Logic

Yang, J., Dengi, E. & Vrudhula, S., Mar 22 2018, (Accepted/In press) In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Research output: Contribution to journal › Article

Tunnel junctions

Flip flop circuits

Nonvolatile storage

Energy utilization

Torque

7 Citations (Scopus)

DORA: Optimizing Smartphone Energy Efficiency and Web Browser Performance under Interference

Shingari, D., Arunkumar, A., Gaudette, B., Vrudhula, S. & Wu, C-J., May 25 2018, Proceedings - 2018 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2018. Institute of Electrical and Electronics Engineers Inc., p. 64-75 12 p.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Web browsers

Smartphones

Energy efficiency

Websites

Governors