Research Output per year
Personal profile
Education/Academic qualification
PHD, University of Southern California
… → 1985
MS, University of Southern California
… → 1981
BMTH, University of Waterloo
… → 1976
Fingerprint Dive into the research topics where Sarma Vrudhula is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
- 17 Similar Profiles
Threshold logic
Engineering & Materials Science
Networks (circuits)
Engineering & Materials Science
Logic gates
Engineering & Materials Science
Field programmable gate arrays (FPGA)
Engineering & Materials Science
Logic circuits
Engineering & Materials Science
Hardware
Engineering & Materials Science
Throughput
Engineering & Materials Science
Data storage equipment
Engineering & Materials Science
Network
Recent external collaboration on country level. Dive into details by clicking on the dots.
Research Output 1993 2018
14
Citations
(Scopus)
ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler
Ma, Y., Suda, N., Cao, Y., Vrudhula, S. & Seo, J., Jan 1 2018, (Accepted/In press) In : Integration, the VLSI Journal.Research output: Contribution to journal › Article
Learning algorithms
Field programmable gate arrays (FPGA)
Neural networks
Throughput
Hardware
Algorithm-hardware co-design of single shot detector for fast object detection on FPGAs
Ma, Y., Zheng, T., Cao, Y., Vrudhula, S. & Seo, J., Nov 5 2018, 2018 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2018 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., a57Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Field programmable gate arrays (FPGA)
Detectors
Hardware
Image classification
Digital circuits
1
Citation
(Scopus)
Automatic Compilation of Diverse CNNs onto High-Performance FPGA Accelerators
Ma, Y., Cao, Y., Vrudhula, S. & Seo, J., Jan 1 2018, (Accepted/In press) In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.Research output: Contribution to journal › Article
Particle accelerators
Field programmable gate arrays (FPGA)
Neural networks
Hardware
Complex networks
1
Citation
(Scopus)
Design Considerations for Energy-Efficient and Variation-Tolerant Nonvolatile Logic
Yang, J., Dengi, E. & Vrudhula, S., Mar 22 2018, (Accepted/In press) In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems.Research output: Contribution to journal › Article
Tunnel junctions
Flip flop circuits
Nonvolatile storage
Energy utilization
Torque
8
Citations
(Scopus)
DORA: Optimizing Smartphone Energy Efficiency and Web Browser Performance under Interference
Shingari, D., Arunkumar, A., Gaudette, B., Vrudhula, S. & Wu, C-J., May 25 2018, Proceedings - 2018 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2018. Institute of Electrical and Electronics Engineers Inc., p. 64-75 12 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Web browsers
Smartphones
Energy efficiency
Websites
Governors
Projects 2005 2020
CES Project: Machine Learning on the Edge
INDUSTRY: Various Consortium Members
8/1/19 → 8/31/20
Project: Research project
Accelerating Datacenter FPGAs for Deep Learning Training Workloads (ASUF 30007810)
Seo, J., Cao, Y. & Vrudhula, S.
9/1/17 → 8/31/20
Project: Research project
CES Project: Efficient Off-loading of Code in Mobile-Cloud with Performance Battery and Energy Considerations
INDUSTRY: Various Consortium Members
8/1/17 → 8/31/20
Project: Research project
CES Admin Account: Consortium for Embedded Systems
INDUSTRY: Various Consortium Members
5/1/17 → 8/31/20
Project: Research project
I UCRC: Consortium for Embedded Systems - Phase II
National Science Foundation (NSF)
4/15/14 → 3/31/20
Project: Research project
Embedded systems
Industry
Students
Computer hardware
Energy efficiency