Some fundamental issues on metallization in VLSI (Invited Paper)

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Metallization, and conductor systems in general, are a critical part of any VLSI chip, and as such can act to set limits on future down-scaling of such integrated circuits. Due to decreasing lateral and vertical dimensions, interconnections are rapidly becoming a problem in terms of device yield, reliability, signal delay time, and interdevice interactions. In this paper, we discuss how interconnection limitations will affect the scaling of advanced circuits. We also cover a number of issues regarding the interconnection technologies that will be required in future ULSI circuits. The problems with conductor systems begin with the interconnection topology which provides constraints and limitations. The physical problems then begin with the deposition of the materials. For example, chemical vapor deposition of metal or metal- silicide interconnects causes several unique concerns due to surface chemistry, leading to undesirable reactions and compositional and structural nonuniformities. Similarly, factors such as control of step coverage are important for reduced geometries. Recent experiments and modeling techniques which address these problems are therefore described. Lithographical aspects also pose problems in the scaling of metal lines and new pattern definition techniques are discussed. Finally, isolation of information within dense crossing interconnects can become very difficult, with coupling causing degradation of information within localized devices.

Original languageEnglish (US)
Title of host publicationProceedings of SPIE - The International Society for Optical Engineering
EditorsGennady S. Gildenblat, Gary P. Schwartz
PublisherPubl by Int Soc for Optical Engineering
Pages2-11
Number of pages10
ISBN (Print)0819407275
StatePublished - Dec 1 1991
EventMetallization: Performance and Reliability Issues for VLSI and ULSI - San Jose, CA, USA
Duration: Sep 12 1991Sep 13 1991

Publication series

NameProceedings of SPIE - The International Society for Optical Engineering
Volume1596
ISSN (Print)0277-786X

Other

OtherMetallization: Performance and Reliability Issues for VLSI and ULSI
CitySan Jose, CA, USA
Period9/12/919/13/91

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Computer Science Applications
  • Applied Mathematics
  • Electrical and Electronic Engineering

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  • Cite this

    Ferry, D. K., Kozicki, M., & Raupp, G. (1991). Some fundamental issues on metallization in VLSI (Invited Paper). In G. S. Gildenblat, & G. P. Schwartz (Eds.), Proceedings of SPIE - The International Society for Optical Engineering (pp. 2-11). (Proceedings of SPIE - The International Society for Optical Engineering; Vol. 1596). Publ by Int Soc for Optical Engineering.