2 Scopus citations

Abstract

This paper presents a design of strong physical unclonable function (PUF) exploiting the sneak paths in the resistive X-point array. The entanglement of the sneak paths in the X-point array greatly enhances the entropy of the physical system, thereby increasing the space of challenge-response pairs. To eliminate the undesired collision or diffuseness in X-point PUF with ``analog'' resistance distribution and ``digital'' resistance distribution is employed in this paper. The effect of design parameters and non-ideal properties in X-point array on the performance of X-point PUF is systematically investigated by Simulation Program with Integrated Circuit Emphasis (SPICE) simulation. The simulation results show that--1) the PUF's performance presents strong dependence on the percent of cells in the on-state, thus should be carefully optimized for the robustness against the reference current variation of the sense amplifier; 2) the interconnect resistance decreases the column current thus the reference current should scale down with the scaling of technology node; 3) larger on/off ratio is desired to achieve low power consumption and high robustness against reference current variation; and 4) the device-to-device variation might degrade the performance of X-point PUF, which can be mitigated with write-verify programming scheme in the PUF construction phase. In addition, the proposed X-point PUF presents no correlation between challenges and responses, and strong security against the possible SPICE modeling attack and machine learning attack. Compared with the conventional Arbiter PUF, the X-point PUF has benefits in smaller area, lower energy, and enhanced security.

Original languageEnglish (US)
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
DOIs
StateAccepted/In press - Mar 14 2018

    Fingerprint

Keywords

  • hardware security.
  • PUF
  • reliability
  • resistive memory
  • sneak path
  • uniqueness
  • X-point array

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this