Write disturb analyses on half-selected cells of cross-point RRAM arrays

Haitong Li; Hong Yu Chen; Zhe Chen; Bing Chen; Rui Liu; Gang Qiu; Peng Huang; Feifei Zhang; Zizhen Jiang; Bin Gao; Lifeng Liu; Xiaoyan Liu; Shimeng Yu; H. S Philip Wong; Jinfeng Kang

doi:10.1109/IRPS.2014.6861158

Write disturb analyses on half-selected cells of cross-point RRAM arrays

Haitong Li, Hong Yu Chen, Zhe Chen, Bing Chen, Rui Liu, Gang Qiu, Peng Huang, Feifei Zhang, Zizhen Jiang, Bin Gao, Lifeng Liu, Xiaoyan Liu, Shimeng Yu, H. S Philip Wong, Jinfeng Kang

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

25 Scopus citations

Abstract

Write disturb on half-selected (HS) cells is investigated through electrical measurements and large-scale array simulations. The experimental results collected from the individual devices under constant stress voltage and consecutive pulse operation are correlated with the HS cells in large-scale arrays based on a physics-based SPICE compact model. The impact of write/read disturb on the HS cells at different locations of the arrays is analyzed. Design guidelines for the optimized array size based on the experimental data and HSPICE simulations are presented: e.g., a 16 kb array can maintain its stored data pattern for 5×10⁶ pulses and will have 164 false bits among half-selected cells after write disturb.

Original language	English (US)
Title of host publication	2014 IEEE International Reliability Physics Symposium, IRPS 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	MY.3.1-MY.3.4
ISBN (Print)	9781479933167
DOIs	https://doi.org/10.1109/IRPS.2014.6861158
State	Published - 2014
Event	52nd IEEE International Reliability Physics Symposium, IRPS 2014 - Waikoloa, HI, United States Duration: Jun 1 2014 → Jun 5 2014

Publication series

Name	IEEE International Reliability Physics Symposium Proceedings
ISSN (Print)	1541-7026

Other

Other	52nd IEEE International Reliability Physics Symposium, IRPS 2014
Country/Territory	United States
City	Waikoloa, HI
Period	6/1/14 → 6/5/14

Keywords

Resistive random access memory (RRAM)
cross-point
failure
reliability
write disturb

ASJC Scopus subject areas

General Engineering

Access to Document

10.1109/IRPS.2014.6861158

Cite this

Li, H., Chen, H. Y., Chen, Z., Chen, B., Liu, R., Qiu, G., Huang, P., Zhang, F., Jiang, Z., Gao, B., Liu, L., Liu, X., Yu, S., Wong, H. S. P., & Kang, J. (2014). Write disturb analyses on half-selected cells of cross-point RRAM arrays. In 2014 IEEE International Reliability Physics Symposium, IRPS 2014 (pp. MY.3.1-MY.3.4). Article 6861158 (IEEE International Reliability Physics Symposium Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IRPS.2014.6861158

Write disturb analyses on half-selected cells of cross-point RRAM arrays. / Li, Haitong; Chen, Hong Yu; Chen, Zhe et al.
2014 IEEE International Reliability Physics Symposium, IRPS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. p. MY.3.1-MY.3.4 6861158 (IEEE International Reliability Physics Symposium Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Li, H, Chen, HY, Chen, Z, Chen, B, Liu, R, Qiu, G, Huang, P, Zhang, F, Jiang, Z, Gao, B, Liu, L, Liu, X, Yu, S, Wong, HSP & Kang, J 2014, Write disturb analyses on half-selected cells of cross-point RRAM arrays. in 2014 IEEE International Reliability Physics Symposium, IRPS 2014., 6861158, IEEE International Reliability Physics Symposium Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. MY.3.1-MY.3.4, 52nd IEEE International Reliability Physics Symposium, IRPS 2014, Waikoloa, HI, United States, 6/1/14. https://doi.org/10.1109/IRPS.2014.6861158

Li H, Chen HY, Chen Z, Chen B, Liu R, Qiu G et al. Write disturb analyses on half-selected cells of cross-point RRAM arrays. In 2014 IEEE International Reliability Physics Symposium, IRPS 2014. Institute of Electrical and Electronics Engineers Inc. 2014. p. MY.3.1-MY.3.4. 6861158. (IEEE International Reliability Physics Symposium Proceedings). doi: 10.1109/IRPS.2014.6861158

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abstract = "Write disturb on half-selected (HS) cells is investigated through electrical measurements and large-scale array simulations. The experimental results collected from the individual devices under constant stress voltage and consecutive pulse operation are correlated with the HS cells in large-scale arrays based on a physics-based SPICE compact model. The impact of write/read disturb on the HS cells at different locations of the arrays is analyzed. Design guidelines for the optimized array size based on the experimental data and HSPICE simulations are presented: e.g., a 16 kb array can maintain its stored data pattern for 5×106 pulses and will have 164 false bits among half-selected cells after write disturb.",

keywords = "Resistive random access memory (RRAM), cross-point, failure, reliability, write disturb",

author = "Haitong Li and Chen, {Hong Yu} and Zhe Chen and Bing Chen and Rui Liu and Gang Qiu and Peng Huang and Feifei Zhang and Zizhen Jiang and Bin Gao and Lifeng Liu and Xiaoyan Liu and Shimeng Yu and Wong, {H. S Philip} and Jinfeng Kang",

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AU - Huang, Peng

AU - Zhang, Feifei

AU - Jiang, Zizhen

AU - Gao, Bin

AU - Liu, Lifeng

AU - Liu, Xiaoyan

AU - Yu, Shimeng

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AB - Write disturb on half-selected (HS) cells is investigated through electrical measurements and large-scale array simulations. The experimental results collected from the individual devices under constant stress voltage and consecutive pulse operation are correlated with the HS cells in large-scale arrays based on a physics-based SPICE compact model. The impact of write/read disturb on the HS cells at different locations of the arrays is analyzed. Design guidelines for the optimized array size based on the experimental data and HSPICE simulations are presented: e.g., a 16 kb array can maintain its stored data pattern for 5×106 pulses and will have 164 false bits among half-selected cells after write disturb.

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Write disturb analyses on half-selected cells of cross-point RRAM arrays

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Keywords

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