Wafer-level RF test and DfT for VCO modulating transceiver architecures

Sule Ozev; Christian Olgaard

doi:10.1109/VTEST.2004.1299246

Wafer-level RF test and DfT for VCO modulating transceiver architecures

Sule Ozev, Christian Olgaard

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

26 Scopus citations

Abstract

Traditionally, radio frequency (RF) paths are bypassed during wafer sort due to the high cost of RF testing. Increasing packaging costs, however, result in a need for a more thorough wafer-level testing including the RF path. In this paper, we propose a loop-back architecture, along with a novel, all-digital design-for-testability (DfT) modification that enables cost efficient testing of various defects at the wafer level. These methods are applicable to a wide range of cost-sensitive applications that use the modulation of the voltage-controlled-oscillator(VCO). Experimental results using a Bluetooth platform and considering a variety of defects confirm the viability of the approach.

Original language	English (US)
Title of host publication	Proceedings of the IEEE VLSI Test Symposium
Pages	217-222
Number of pages	6
DOIs	https://doi.org/10.1109/VTEST.2004.1299246
State	Published - 2004
Externally published	Yes
Event	Proceedings - 22nd IEEE VLSI Test Symposium - Napa Valley, CA, United States Duration: Apr 25 2004 → Apr 29 2004

Other

Other	Proceedings - 22nd IEEE VLSI Test Symposium
Country/Territory	United States
City	Napa Valley, CA
Period	4/25/04 → 4/29/04

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/VTEST.2004.1299246

Cite this

@inproceedings{62f3384cd8654a3daac3a8295f2f2d9c,

title = "Wafer-level RF test and DfT for VCO modulating transceiver architecures",

abstract = "Traditionally, radio frequency (RF) paths are bypassed during wafer sort due to the high cost of RF testing. Increasing packaging costs, however, result in a need for a more thorough wafer-level testing including the RF path. In this paper, we propose a loop-back architecture, along with a novel, all-digital design-for-testability (DfT) modification that enables cost efficient testing of various defects at the wafer level. These methods are applicable to a wide range of cost-sensitive applications that use the modulation of the voltage-controlled-oscillator(VCO). Experimental results using a Bluetooth platform and considering a variety of defects confirm the viability of the approach.",

author = "Sule Ozev and Christian Olgaard",

year = "2004",

doi = "10.1109/VTEST.2004.1299246",

language = "English (US)",

pages = "217--222",

booktitle = "Proceedings of the IEEE VLSI Test Symposium",

note = "Proceedings - 22nd IEEE VLSI Test Symposium ; Conference date: 25-04-2004 Through 29-04-2004",

}

TY - GEN

T1 - Wafer-level RF test and DfT for VCO modulating transceiver architecures

AU - Ozev, Sule

AU - Olgaard, Christian

PY - 2004

Y1 - 2004

N2 - Traditionally, radio frequency (RF) paths are bypassed during wafer sort due to the high cost of RF testing. Increasing packaging costs, however, result in a need for a more thorough wafer-level testing including the RF path. In this paper, we propose a loop-back architecture, along with a novel, all-digital design-for-testability (DfT) modification that enables cost efficient testing of various defects at the wafer level. These methods are applicable to a wide range of cost-sensitive applications that use the modulation of the voltage-controlled-oscillator(VCO). Experimental results using a Bluetooth platform and considering a variety of defects confirm the viability of the approach.

AB - Traditionally, radio frequency (RF) paths are bypassed during wafer sort due to the high cost of RF testing. Increasing packaging costs, however, result in a need for a more thorough wafer-level testing including the RF path. In this paper, we propose a loop-back architecture, along with a novel, all-digital design-for-testability (DfT) modification that enables cost efficient testing of various defects at the wafer level. These methods are applicable to a wide range of cost-sensitive applications that use the modulation of the voltage-controlled-oscillator(VCO). Experimental results using a Bluetooth platform and considering a variety of defects confirm the viability of the approach.

UR - http://www.scopus.com/inward/record.url?scp=3142748450&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=3142748450&partnerID=8YFLogxK

U2 - 10.1109/VTEST.2004.1299246

DO - 10.1109/VTEST.2004.1299246

M3 - Conference contribution

AN - SCOPUS:3142748450

SP - 217

EP - 222

BT - Proceedings of the IEEE VLSI Test Symposium

T2 - Proceedings - 22nd IEEE VLSI Test Symposium

Y2 - 25 April 2004 through 29 April 2004

ER -

Wafer-level RF test and DfT for VCO modulating transceiver architecures

Abstract

Other

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this