Voltage scaling for energy minimization with QoS constraints

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

In this paper we propose variable voltage scheduling algorithms that minimize energy while satisfying the quality of service requirements. We consider the case when multiple applications are running on a single processor equipped with a limited sized buffer and each application has a different computational load and timing constraint. We use the Lagrange multiplier method to theoretically determine the relation between the application voltages such that the energy is minimum, and then develop iterative algorithms to satisfy the relation. The iterative algorithms find the minimum energy solution with polynomial time complexity for both the off-line case and the on-line case. We show the effect of buffer size and application deadline times on the ability of the system to reduce energy. Furthermore, we consider the effect of discharge current on battery life and show that the voltage assignment for maximum battery capacity is very similar to the voltage assignment for minimum energy.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Pages438-443
Number of pages6
StatePublished - 2001
EventIEEE International Conference on: Computer Design: VLSI in Computers and Processors (ICCD 2001) - Austin, TX, United States
Duration: Sep 23 2001Sep 26 2001

Other

OtherIEEE International Conference on: Computer Design: VLSI in Computers and Processors (ICCD 2001)
CountryUnited States
CityAustin, TX
Period9/23/019/26/01

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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