Abstract
Power and energy constraints are becoming increasingly prevalent in real-time embedded systems. Voltage-scaling is a promising technique to reduce energy and power consumption: clock speed tends to decrease linearly with supply voltage while power consumption goes down quadratically. We therefore have a tradeoff between the energy consumption of a task and the speed with which it can be completed. The timing constraints associated with real-time tasks can be used to resolve this tradeoff. In this paper, we present two algorithms for voltage-scaling. Assuming that a processor can operate in one of two modes: high voltage and low voltage, we show how to schedule the voltage settings so that deadlines are met while reducing the total energy consumed. We show that significant reductions can be made in energy consumption.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 303-317 |
| Number of pages | 15 |
| Journal | Real-Time Systems |
| Volume | 24 |
| Issue number | 3 |
| DOIs | |
| State | Published - May 2003 |
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Keywords
- Low-power designs
- Real-time embedded systems
- Scheduling
- Voltage-scaling
ASJC Scopus subject areas
- Computational Theory and Mathematics
- Theoretical Computer Science
Cite this
Voltage-clock scaling for low energy consumption in fixed-priority real-time systems. / Lee, Yann-Hang; Krishna, C. M.
In: Real-Time Systems, Vol. 24, No. 3, 05.2003, p. 303-317.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Voltage-clock scaling for low energy consumption in fixed-priority real-time systems
AU - Lee, Yann-Hang
AU - Krishna, C. M.
PY - 2003/5
Y1 - 2003/5
N2 - Power and energy constraints are becoming increasingly prevalent in real-time embedded systems. Voltage-scaling is a promising technique to reduce energy and power consumption: clock speed tends to decrease linearly with supply voltage while power consumption goes down quadratically. We therefore have a tradeoff between the energy consumption of a task and the speed with which it can be completed. The timing constraints associated with real-time tasks can be used to resolve this tradeoff. In this paper, we present two algorithms for voltage-scaling. Assuming that a processor can operate in one of two modes: high voltage and low voltage, we show how to schedule the voltage settings so that deadlines are met while reducing the total energy consumed. We show that significant reductions can be made in energy consumption.
AB - Power and energy constraints are becoming increasingly prevalent in real-time embedded systems. Voltage-scaling is a promising technique to reduce energy and power consumption: clock speed tends to decrease linearly with supply voltage while power consumption goes down quadratically. We therefore have a tradeoff between the energy consumption of a task and the speed with which it can be completed. The timing constraints associated with real-time tasks can be used to resolve this tradeoff. In this paper, we present two algorithms for voltage-scaling. Assuming that a processor can operate in one of two modes: high voltage and low voltage, we show how to schedule the voltage settings so that deadlines are met while reducing the total energy consumed. We show that significant reductions can be made in energy consumption.
KW - Low-power designs
KW - Real-time embedded systems
KW - Scheduling
KW - Voltage-scaling
UR - http://www.scopus.com/inward/record.url?scp=0038682021&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0038682021&partnerID=8YFLogxK
U2 - 10.1023/A:1022864617640
DO - 10.1023/A:1022864617640
M3 - Article
AN - SCOPUS:0038682021
VL - 24
SP - 303
EP - 317
JO - Real-Time Systems
JF - Real-Time Systems
SN - 0922-6443
IS - 3
ER -