Abstract
Many embedded systems operate under severe power and energy constraints. Voltage clock scaling is one mechanism by which energy consumption may be reduced: it is based on the fact that power consumption is a quadratic function of the voltage, while the speed is a linear function. In this paper, we show how voltage scaling can be scheduled to reduce energy usage while still meeting real-time deadlines.
Original language | English (US) |
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Title of host publication | Real-Time Technology and Applications - Proceedings |
Publisher | IEEE |
Pages | 156-165 |
Number of pages | 10 |
State | Published - 2000 |
Externally published | Yes |
Event | RTAS 2000: 6th IEEE Real-Time Technology and Applications Symposium - Washington, DC, USA Duration: May 31 2000 → Jun 2 2000 |
Other
Other | RTAS 2000: 6th IEEE Real-Time Technology and Applications Symposium |
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City | Washington, DC, USA |
Period | 5/31/00 → 6/2/00 |
ASJC Scopus subject areas
- Hardware and Architecture
- Computer Networks and Communications
- Software