@inproceedings{b0bececbf195406d8541860daf0973aa,
title = "Vesti: An In-Memory Computing Processor for Deep Neural Networks Acceleration",
abstract = "We present Vesti, a Deep Neural Network (DNN) accelerator optimized for energy-constrained hardware platforms such as mobile, wearable, and Internet of Things (IoT) devices. Vesti integrates instances of in-memory computing (IMC) SRAM macros with an ensemble of peripheral digital circuits for dataflow management. The IMC SRAM macros eliminate the data access bottleneck that hinders conventional ASIC implementations performing dot-product computation, while the peripheral circuits improve the macros' parallelism and utilization for practical applications. Vesti supports large-scale DNNs with configurable activation precision, substantially improving chip-level energy-efficiency with favorable accuracy trade-off. The Vesti accelerator is designed and laid out in 65 nm CMOS, demonstrating ultra-low energy consumption of less than <20nJ for MNIST classification and <40μJ for CIFAR-10 classification at 1.0V supply.",
keywords = "In-memory computing, SRAM, deep learning accelerator, deep neural networks, double-buffering",
author = "Zhewei Jiang and Shihui Yin and Minkyu Kim and Tushar Gupta and Mingoo Seok and Seo, {Jae Sun}",
note = "Funding Information: ACKNOWLEDGEMENTS This work is in part supported by NSF grant 1652866, and C-BRIC, one of six centers in JUMP, a SRC program sponsored by DARPA. Publisher Copyright: {\textcopyright} 2019 IEEE.; 53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019 ; Conference date: 03-11-2019 Through 06-11-2019",
year = "2019",
month = nov,
doi = "10.1109/IEEECONF44664.2019.9048678",
language = "English (US)",
series = "Conference Record - Asilomar Conference on Signals, Systems and Computers",
publisher = "IEEE Computer Society",
pages = "1516--1521",
editor = "Matthews, {Michael B.}",
booktitle = "Conference Record - 53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019",
}